[Mesa-dev] [PATCH 4/8] gallium/radeon: remove RADEON_HEAP_VRAM_GTT

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

Only winsyses can set VRAM|GTT. Drivers shouldn't if they want to use
winsys allocators.
---
 src/gallium/drivers/radeon/radeon_winsys.h | 10 ++--------
 1 file changed, 2 insertions(+), 8 deletions(-)

diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h
index 7ab110a..1d59b28 100644
--- a/src/gallium/drivers/radeon/radeon_winsys.h
+++ b/src/gallium/drivers/radeon/radeon_winsys.h
@@ -647,74 +647,69 @@ static inline void radeon_emit(struct radeon_winsys_cs *cs, uint32_t value)
 static inline void radeon_emit_array(struct radeon_winsys_cs *cs,
 				     const uint32_t *values, unsigned count)
 {
     memcpy(cs->current.buf + cs->current.cdw, values, count * 4);
     cs->current.cdw += count;
 }
 
 enum radeon_heap {
     RADEON_HEAP_VRAM_NO_CPU_ACCESS,
     RADEON_HEAP_VRAM,
-    RADEON_HEAP_VRAM_GTT, /* combined heaps */
     RADEON_HEAP_GTT_WC,
     RADEON_HEAP_GTT,
     RADEON_MAX_SLAB_HEAPS,
     RADEON_MAX_CACHED_HEAPS = RADEON_MAX_SLAB_HEAPS,
 };
 
 static inline enum radeon_bo_domain radeon_domain_from_heap(enum radeon_heap heap)
 {
     switch (heap) {
     case RADEON_HEAP_VRAM_NO_CPU_ACCESS:
     case RADEON_HEAP_VRAM:
         return RADEON_DOMAIN_VRAM;
-    case RADEON_HEAP_VRAM_GTT:
-        return RADEON_DOMAIN_VRAM_GTT;
     case RADEON_HEAP_GTT_WC:
     case RADEON_HEAP_GTT:
         return RADEON_DOMAIN_GTT;
     default:
         assert(0);
         return (enum radeon_bo_domain)0;
     }
 }
 
 static inline unsigned radeon_flags_from_heap(enum radeon_heap heap)
 {
     switch (heap) {
     case RADEON_HEAP_VRAM_NO_CPU_ACCESS:
         return RADEON_FLAG_GTT_WC |
                RADEON_FLAG_NO_CPU_ACCESS |
                RADEON_FLAG_NO_INTERPROCESS_SHARING;
 
     case RADEON_HEAP_VRAM:
-    case RADEON_HEAP_VRAM_GTT:
     case RADEON_HEAP_GTT_WC:
         return RADEON_FLAG_GTT_WC |
                RADEON_FLAG_NO_INTERPROCESS_SHARING;
 
     case RADEON_HEAP_GTT:
     default:
         return RADEON_FLAG_NO_INTERPROCESS_SHARING;
     }
 }
 
 /* The pb cache bucket is chosen to minimize pb_cache misses.
  * It must be between 0 and 3 inclusive.
  */
 static inline unsigned radeon_get_pb_cache_bucket_index(enum radeon_heap heap)
 {
     switch (heap) {
     case RADEON_HEAP_VRAM_NO_CPU_ACCESS:
         return 0;
     case RADEON_HEAP_VRAM:
-    case RADEON_HEAP_VRAM_GTT:
         return 1;
     case RADEON_HEAP_GTT_WC:
         return 2;
     case RADEON_HEAP_GTT:
     default:
         return 3;
     }
 }
 
 /* Return the heap index for winsys allocators, or -1 on failure. */
@@ -735,22 +730,21 @@ static inline int radeon_get_heap_index(enum radeon_bo_domain domain,
                   RADEON_FLAG_NO_CPU_ACCESS |
                   RADEON_FLAG_NO_INTERPROCESS_SHARING))
         return -1;
 
     switch (domain) {
     case RADEON_DOMAIN_VRAM:
         if (flags & RADEON_FLAG_NO_CPU_ACCESS)
             return RADEON_HEAP_VRAM_NO_CPU_ACCESS;
         else
             return RADEON_HEAP_VRAM;
-    case RADEON_DOMAIN_VRAM_GTT:
-        return RADEON_HEAP_VRAM_GTT;
     case RADEON_DOMAIN_GTT:
         if (flags & RADEON_FLAG_GTT_WC)
             return RADEON_HEAP_GTT_WC;
         else
             return RADEON_HEAP_GTT;
+    default:
+        return -1;
     }
-    return -1;
 }
 
 #endif
-- 
2.7.4