[Mesa-dev] [PATCH] radeonsi: pass llvm type directly to buffer_load()

[Nicolai Hähnle]

Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com> 


On 04.12.2017 05:17, Timothy Arceri wrote:
> ---
>   src/gallium/drivers/radeonsi/si_shader.c | 15 +++++++--------
>   1 file changed, 7 insertions(+), 8 deletions(-)
> 
> diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
> index a94c2af8709..6a1293b99d1 100644
> --- a/src/gallium/drivers/radeonsi/si_shader.c
> +++ b/src/gallium/drivers/radeonsi/si_shader.c
> @@ -1034,53 +1034,51 @@ static LLVMValueRef get_tcs_tes_buffer_address_from_reg(
>   
>   	param_index = LLVMBuildAdd(ctx->ac.builder, param_index,
>   	                           LLVMConstInt(ctx->i32, param_index_base, 0),
>   	                           "");
>   
>   	return get_tcs_tes_buffer_address(ctx, get_rel_patch_id(ctx),
>   					  vertex_index, param_index);
>   }
>   
>   static LLVMValueRef buffer_load(struct lp_build_tgsi_context *bld_base,
> -                                enum tgsi_opcode_type type, unsigned swizzle,
> +                                LLVMTypeRef type, unsigned swizzle,
>                                   LLVMValueRef buffer, LLVMValueRef offset,
>                                   LLVMValueRef base, bool can_speculate)
>   {
>   	struct si_shader_context *ctx = si_shader_context(bld_base);
>   	LLVMValueRef value, value2;
> -	LLVMTypeRef llvm_type = tgsi2llvmtype(bld_base, type);
> -	LLVMTypeRef vec_type = LLVMVectorType(llvm_type, 4);
> +	LLVMTypeRef vec_type = LLVMVectorType(type, 4);
>   
>   	if (swizzle == ~0) {
>   		value = ac_build_buffer_load(&ctx->ac, buffer, 4, NULL, base, offset,
>   					     0, 1, 0, can_speculate, false);
>   
>   		return LLVMBuildBitCast(ctx->ac.builder, value, vec_type, "");
>   	}
>   
> -	if (!tgsi_type_is_64bit(type)) {
> +	if (!llvm_type_is_64bit(ctx, type)) {
>   		value = ac_build_buffer_load(&ctx->ac, buffer, 4, NULL, base, offset,
>   					     0, 1, 0, can_speculate, false);
>   
>   		value = LLVMBuildBitCast(ctx->ac.builder, value, vec_type, "");
>   		return LLVMBuildExtractElement(ctx->ac.builder, value,
>   		                    LLVMConstInt(ctx->i32, swizzle, 0), "");
>   	}
>   
>   	value = ac_build_buffer_load(&ctx->ac, buffer, 1, NULL, base, offset,
>   	                          swizzle * 4, 1, 0, can_speculate, false);
>   
>   	value2 = ac_build_buffer_load(&ctx->ac, buffer, 1, NULL, base, offset,
>   	                           swizzle * 4 + 4, 1, 0, can_speculate, false);
>   
> -	return si_llvm_emit_fetch_64bit(bld_base, tgsi2llvmtype(bld_base, type),
> -					value, value2);
> +	return si_llvm_emit_fetch_64bit(bld_base, type, value, value2);
>   }
>   
>   /**
>    * Load from LDS.
>    *
>    * \param type		output value type
>    * \param swizzle	offset (typically 0..3); it can be ~0, which loads a vec4
>    * \param dw_addr	address in dwords
>    */
>   static LLVMValueRef lds_load(struct lp_build_tgsi_context *bld_base,
> @@ -1199,21 +1197,22 @@ static LLVMValueRef fetch_input_tes(
>   	enum tgsi_opcode_type type, unsigned swizzle)
>   {
>   	struct si_shader_context *ctx = si_shader_context(bld_base);
>   	LLVMValueRef buffer, base, addr;
>   
>   	buffer = desc_from_addr_base64k(ctx, ctx->param_tcs_offchip_addr_base64k);
>   
>   	base = LLVMGetParam(ctx->main_fn, ctx->param_tcs_offchip_offset);
>   	addr = get_tcs_tes_buffer_address_from_reg(ctx, NULL, reg);
>   
> -	return buffer_load(bld_base, type, swizzle, buffer, base, addr, true);
> +	return buffer_load(bld_base, tgsi2llvmtype(bld_base, type), swizzle,
> +			   buffer, base, addr, true);
>   }
>   
>   static void store_output_tcs(struct lp_build_tgsi_context *bld_base,
>   			     const struct tgsi_full_instruction *inst,
>   			     const struct tgsi_opcode_info *info,
>   			     unsigned index,
>   			     LLVMValueRef dst[4])
>   {
>   	struct si_shader_context *ctx = si_shader_context(bld_base);
>   	const struct tgsi_full_dst_register *reg = &inst->Dst[index];
> @@ -1781,21 +1780,21 @@ void si_load_system_value(struct si_shader_context *ctx,
>   	{
>   		LLVMValueRef buffer, base, addr;
>   		int param = si_shader_io_get_unique_index_patch(decl->Semantic.Name, 0);
>   
>   		buffer = desc_from_addr_base64k(ctx, ctx->param_tcs_offchip_addr_base64k);
>   
>   		base = LLVMGetParam(ctx->main_fn, ctx->param_tcs_offchip_offset);
>   		addr = get_tcs_tes_buffer_address(ctx, get_rel_patch_id(ctx), NULL,
>   		                          LLVMConstInt(ctx->i32, param, 0));
>   
> -		value = buffer_load(&ctx->bld_base, TGSI_TYPE_FLOAT,
> +		value = buffer_load(&ctx->bld_base, ctx->f32,
>   		                    ~0, buffer, base, addr, true);
>   
>   		break;
>   	}
>   
>   	case TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI:
>   	case TGSI_SEMANTIC_DEFAULT_TESSINNER_SI:
>   	{
>   		LLVMValueRef buf, slot, val[4];
>   		int i, offset;
> 


-- 
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Aber vergiss niemals, wie sie sein sollte.