[Mesa-dev] [PATCH] i965/nir: do int64 lowering before optimization
Iago Toral
itoral at igalia.com
Mon Dec 11 08:55:32 UTC 2017
This didn't get any reviews yet. Any takers?
On Fri, 2017-12-01 at 13:46 +0100, Iago Toral Quiroga wrote:
> Otherwise loop unrolling will fail to see the actual cost of
> the unrolling operations when the loop body contains 64-bit integer
> instructions, and very specially when the divmod64 lowering applies,
> since its lowering is quite expensive.
>
> Without this change, some in-development CTS tests for int64
> get stuck forever trying to register allocate a shader with
> over 50K SSA values. The large number of SSA values is the result
> of NIR first unrolling multiple seemingly simple loops that involve
> int64 instructions, only to then lower these instructions to produce
> a massive pile of code (due to the divmod64 lowering in the unrolled
> instructions).
>
> With this change, loop unrolling will see the loops with the int64
> code already lowered and will realize that it is too expensive to
> unroll.
> ---
> src/intel/compiler/brw_nir.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/src/intel/compiler/brw_nir.c
> b/src/intel/compiler/brw_nir.c
> index 8f3f77f89a..ef12cdfff8 100644
> --- a/src/intel/compiler/brw_nir.c
> +++ b/src/intel/compiler/brw_nir.c
> @@ -636,6 +636,10 @@ brw_preprocess_nir(const struct brw_compiler
> *compiler, nir_shader *nir)
>
> OPT(nir_split_var_copies);
>
> + nir_lower_int64(nir, nir_lower_imul64 |
> + nir_lower_isign64 |
> + nir_lower_divmod64);
> +
> nir = brw_nir_optimize(nir, compiler, is_scalar);
>
> if (is_scalar) {
> @@ -663,10 +667,6 @@ brw_preprocess_nir(const struct brw_compiler
> *compiler, nir_shader *nir)
> brw_nir_no_indirect_mask(compiler, nir->info.stage);
> nir_lower_indirect_derefs(nir, indirect_mask);
>
> - nir_lower_int64(nir, nir_lower_imul64 |
> - nir_lower_isign64 |
> - nir_lower_divmod64);
> -
> /* Get rid of split copies */
> nir = brw_nir_optimize(nir, compiler, is_scalar);
>
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