[Mesa-dev] [PATCH 19/18] ac: add load_tess_level() to the abi

[Timothy Arceri]

Fixes the following piglit tests in radeonsi:

vs-tcs-tes-tessinner-tessouter-inputs-quads.shader_test
vs-tcs-tes-tessinner-tessouter-inputs-tris.shader_test
vs-tes-tessinner-tessouter-inputs-quads.shader_test
vs-tes-tessinner-tessouter-inputs-tris.shader_test
---
 src/amd/common/ac_nir_to_llvm.c          | 6 ++++++
 src/amd/common/ac_shader_abi.h           | 4 ++++
 src/gallium/drivers/radeonsi/si_shader.c | 1 +
 3 files changed, 11 insertions(+)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index d2a8691b11b..4de8bd2f0cb 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -4226,20 +4226,26 @@ static void visit_intrinsic(struct ac_nir_context *ctx,
 	case nir_intrinsic_end_primitive:
 		visit_end_primitive(ctx->nctx, instr);
 		break;
 	case nir_intrinsic_load_tess_coord: {
 		LLVMTypeRef type = ctx->nctx ?
 			get_def_type(ctx->nctx->nir, &instr->dest.ssa) :
 			NULL;
 		result = ctx->abi->load_tess_coord(ctx->abi, type, instr->num_components);
 		break;
 	}
+	case nir_intrinsic_load_tess_level_outer:
+		result = ctx->abi->load_tess_level(ctx->abi, shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_OUTER));
+		break;
+	case nir_intrinsic_load_tess_level_inner:
+		result = ctx->abi->load_tess_level(ctx->abi, shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_INNER));
+		break;
 	case nir_intrinsic_load_patch_vertices_in:
 		result = LLVMConstInt(ctx->ac.i32, ctx->nctx->options->key.tcs.input_vertices, false);
 		break;
 	default:
 		fprintf(stderr, "Unknown intrinsic: ");
 		nir_print_instr(&instr->instr, stderr);
 		fprintf(stderr, "\n");
 		break;
 	}
 	if (result) {
diff --git a/src/amd/common/ac_shader_abi.h b/src/amd/common/ac_shader_abi.h
index 2278f37c7cd..3a1e62e899c 100644
--- a/src/amd/common/ac_shader_abi.h
+++ b/src/amd/common/ac_shader_abi.h
@@ -97,20 +97,24 @@ struct ac_shader_abi {
 				  LLVMValueRef src,
 				  unsigned component,
 				  bool is_patch,
 				  bool is_compact,
 				  unsigned writemask);
 
 	LLVMValueRef (*load_tess_coord)(struct ac_shader_abi *abi,
 					LLVMTypeRef type,
 					unsigned num_components);
 
+	LLVMValueRef (*load_tess_level)(struct ac_shader_abi *abi,
+					int param);
+
+
 	LLVMValueRef (*load_ubo)(struct ac_shader_abi *abi, LLVMValueRef index);
 
 	/**
 	 * Load the descriptor for the given buffer.
 	 *
 	 * \param buffer the buffer as presented in NIR: this is the descriptor
 	 *               in Vulkan, and the buffer index in OpenGL/Gallium
 	 * \param write whether buffer contents will be written
 	 */
 	LLVMValueRef (*load_ssbo)(struct ac_shader_abi *abi,
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index b808920c5f5..f8c6ce3bf8d 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -6068,20 +6068,21 @@ static bool si_compile_tgsi_main(struct si_shader_context *ctx,
 		bld_base->emit_fetch_funcs[TGSI_FILE_OUTPUT] = fetch_output_tcs;
 		bld_base->emit_store = store_output_tcs;
 		ctx->abi.store_tcs_outputs = si_nir_store_output_tcs;
 		ctx->abi.emit_outputs = si_llvm_emit_tcs_epilogue;
 		bld_base->emit_epilogue = si_tgsi_emit_epilogue;
 		break;
 	case PIPE_SHADER_TESS_EVAL:
 		bld_base->emit_fetch_funcs[TGSI_FILE_INPUT] = fetch_input_tes;
 		ctx->abi.load_tess_inputs = si_nir_load_input_tes;
 		ctx->abi.load_tess_coord = si_load_tess_coord;
+		ctx->abi.load_tess_level = si_load_tess_level;
 		if (shader->key.as_es)
 			ctx->abi.emit_outputs = si_llvm_emit_es_epilogue;
 		else
 			ctx->abi.emit_outputs = si_llvm_emit_vs_epilogue;
 		bld_base->emit_epilogue = si_tgsi_emit_epilogue;
 		break;
 	case PIPE_SHADER_GEOMETRY:
 		bld_base->emit_fetch_funcs[TGSI_FILE_INPUT] = fetch_input_gs;
 		ctx->abi.load_inputs = si_nir_load_input_gs;
 		ctx->abi.emit_vertex = si_llvm_emit_vertex;
-- 
2.14.3