[Mesa-dev] [PATCH 4/4] amd/common: add ac_build_waitcnt()
Bas Nieuwenhuizen
bas at basnieuwenhuizen.nl
Tue Dec 12 19:37:44 UTC 2017
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
for the series.
On Tue, Dec 12, 2017 at 6:10 PM, Samuel Pitoiset
<samuel.pitoiset at gmail.com> wrote:
> Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
> ---
> src/amd/common/ac_llvm_build.c | 9 +++++++++
> src/amd/common/ac_llvm_build.h | 2 ++
> src/amd/common/ac_nir_to_llvm.c | 14 ++------------
> src/gallium/drivers/radeonsi/si_shader.c | 13 ++-----------
> src/gallium/drivers/radeonsi/si_shader_internal.h | 2 --
> src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c | 4 ++--
> 6 files changed, 17 insertions(+), 27 deletions(-)
>
> diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
> index baa921d655..b407678c3b 100644
> --- a/src/amd/common/ac_llvm_build.c
> +++ b/src/amd/common/ac_llvm_build.c
> @@ -1482,6 +1482,15 @@ LLVMValueRef ac_build_bfe(struct ac_llvm_context *ctx, LLVMValueRef input,
> AC_FUNC_ATTR_LEGACY);
> }
>
> +void ac_build_waitcnt(struct ac_llvm_context *ctx, unsigned simm16)
> +{
> + LLVMValueRef args[1] = {
> + LLVMConstInt(ctx->i32, simm16, false),
> + };
> + ac_build_intrinsic(ctx, "llvm.amdgcn.s.waitcnt",
> + ctx->voidt, args, 1, 0);
> +}
> +
> void ac_get_image_intr_name(const char *base_name,
> LLVMTypeRef data_type,
> LLVMTypeRef coords_type,
> diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
> index 655dc1dcc8..4a570c41bc 100644
> --- a/src/amd/common/ac_llvm_build.h
> +++ b/src/amd/common/ac_llvm_build.h
> @@ -286,6 +286,8 @@ LLVMValueRef ac_build_bfe(struct ac_llvm_context *ctx, LLVMValueRef input,
> LLVMValueRef offset, LLVMValueRef width,
> bool is_signed);
>
> +void ac_build_waitcnt(struct ac_llvm_context *ctx, unsigned simm16);
> +
> void ac_get_image_intr_name(const char *base_name,
> LLVMTypeRef data_type,
> LLVMTypeRef coords_type,
> diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
> index 189421cc4a..255e074e0a 100644
> --- a/src/amd/common/ac_nir_to_llvm.c
> +++ b/src/amd/common/ac_nir_to_llvm.c
> @@ -3656,16 +3656,6 @@ static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
> #define LGKM_CNT 0x07f
> #define VM_CNT 0xf70
>
> -static void emit_waitcnt(struct nir_to_llvm_context *ctx,
> - unsigned simm16)
> -{
> - LLVMValueRef args[1] = {
> - LLVMConstInt(ctx->ac.i32, simm16, false),
> - };
> - ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.s.waitcnt",
> - ctx->ac.voidt, args, 1, 0);
> -}
> -
> static void emit_membar(struct nir_to_llvm_context *ctx,
> const nir_intrinsic_instr *instr)
> {
> @@ -3688,7 +3678,7 @@ static void emit_membar(struct nir_to_llvm_context *ctx,
> break;
> }
> if (waitcnt != NOOP_WAITCNT)
> - emit_waitcnt(ctx, waitcnt);
> + ac_build_waitcnt(&ctx->ac, waitcnt);
> }
>
> static void emit_barrier(struct nir_to_llvm_context *ctx)
> @@ -3699,7 +3689,7 @@ static void emit_barrier(struct nir_to_llvm_context *ctx)
> */
> if (ctx->options->chip_class == SI &&
> ctx->stage == MESA_SHADER_TESS_CTRL) {
> - emit_waitcnt(ctx, LGKM_CNT & VM_CNT);
> + ac_build_waitcnt(&ctx->ac, LGKM_CNT & VM_CNT);
> return;
> }
> ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.s.barrier",
> diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
> index 5da9ec0bf5..de6aa44aa3 100644
> --- a/src/gallium/drivers/radeonsi/si_shader.c
> +++ b/src/gallium/drivers/radeonsi/si_shader.c
> @@ -3679,15 +3679,6 @@ static void si_llvm_return_fs_outputs(struct ac_shader_abi *abi,
> ctx->return_value = ret;
> }
>
> -void si_emit_waitcnt(struct si_shader_context *ctx, unsigned simm16)
> -{
> - LLVMValueRef args[1] = {
> - LLVMConstInt(ctx->i32, simm16, 0)
> - };
> - lp_build_intrinsic(ctx->ac.builder, "llvm.amdgcn.s.waitcnt",
> - ctx->voidt, args, 1, 0);
> -}
> -
> static void membar_emit(
> const struct lp_build_tgsi_action *action,
> struct lp_build_tgsi_context *bld_base,
> @@ -3710,7 +3701,7 @@ static void membar_emit(
> waitcnt &= LGKM_CNT;
>
> if (waitcnt != NOOP_WAITCNT)
> - si_emit_waitcnt(ctx, waitcnt);
> + ac_build_waitcnt(&ctx->ac, waitcnt);
> }
>
> static void clock_emit(
> @@ -4196,7 +4187,7 @@ static void si_llvm_emit_barrier(const struct lp_build_tgsi_action *action,
> */
> if (ctx->screen->info.chip_class == SI &&
> ctx->type == PIPE_SHADER_TESS_CTRL) {
> - si_emit_waitcnt(ctx, LGKM_CNT & VM_CNT);
> + ac_build_waitcnt(&ctx->ac, LGKM_CNT & VM_CNT);
> return;
> }
>
> diff --git a/src/gallium/drivers/radeonsi/si_shader_internal.h b/src/gallium/drivers/radeonsi/si_shader_internal.h
> index f50a022db8..e05927c7fd 100644
> --- a/src/gallium/drivers/radeonsi/si_shader_internal.h
> +++ b/src/gallium/drivers/radeonsi/si_shader_internal.h
> @@ -294,8 +294,6 @@ void si_llvm_emit_store(struct lp_build_tgsi_context *bld_base,
> #define LGKM_CNT 0x07f
> #define VM_CNT 0xf70
>
> -void si_emit_waitcnt(struct si_shader_context *ctx, unsigned simm16);
> -
> LLVMValueRef si_get_indirect_index(struct si_shader_context *ctx,
> const struct tgsi_ind_register *ind,
> unsigned addr_mul, int rel_index);
> diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
> index 35ada5f93c..099f86bd22 100644
> --- a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
> +++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
> @@ -567,7 +567,7 @@ static void load_emit(
> }
>
> if (inst->Memory.Qualifier & TGSI_MEMORY_VOLATILE)
> - si_emit_waitcnt(ctx, VM_CNT);
> + ac_build_waitcnt(&ctx->ac, VM_CNT);
>
> can_speculate = !(inst->Memory.Qualifier & TGSI_MEMORY_VOLATILE) &&
> is_oneway_access_only(inst, info,
> @@ -780,7 +780,7 @@ static void store_emit(
> }
>
> if (inst->Memory.Qualifier & TGSI_MEMORY_VOLATILE)
> - si_emit_waitcnt(ctx, VM_CNT);
> + ac_build_waitcnt(&ctx->ac, VM_CNT);
>
> writeonly_memory = is_oneway_access_only(inst, info,
> info->shader_buffers_load |
> --
> 2.15.1
>
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