[Mesa-dev] [PATCH v2 4/5] i965: use ASTC5x5 workaround in brw_compute
kevin.rogovin at intel.com
kevin.rogovin at intel.com
Thu Dec 14 17:39:50 UTC 2017
From: Kevin Rogovin <kevin.rogovin at intel.com>
Signed-off-by: Kevin Rogovin <kevin.rogovin at intel.com>
---
src/mesa/drivers/dri/i965/brw_compute.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_compute.c b/src/mesa/drivers/dri/i965/brw_compute.c
index 9be7523..c8d90f5 100644
--- a/src/mesa/drivers/dri/i965/brw_compute.c
+++ b/src/mesa/drivers/dri/i965/brw_compute.c
@@ -179,6 +179,12 @@ brw_dispatch_compute_common(struct gl_context *ctx)
brw_predraw_resolve_inputs(brw, false);
+ /* if necessary, perform astc5x5 workarounds to make sure sampling
+ * from astc5x5 and textures with an auxilary surface have a command
+ * streamer stall and texture invalidate between them.
+ */
+ gen9_astc5x5_perform_wa(brw);
+
/* Flush the batch if the batch/state buffers are nearly full. We can
* grow them if needed, but this is not free, so we'd like to avoid it.
*/
--
2.7.4
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