[Mesa-dev] [PATCH 4/8] intel/blorp: Add suport for fast clear address.
Rafael Antognolli
rafael.antognolli at intel.com
Fri Dec 15 22:53:31 UTC 2017
On gen10+, if surface->clear_color_addr is present, use it directly
intead of copying it to the surface state.
Signed-off-by: Rafael Antognolli <rafael.antognolli at intel.com>
---
src/intel/blorp/blorp_genX_exec.h | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h
index 1968460be05..a01d21c2cdd 100644
--- a/src/intel/blorp/blorp_genX_exec.h
+++ b/src/intel/blorp/blorp_genX_exec.h
@@ -1276,11 +1276,15 @@ blorp_emit_surface_state(struct blorp_batch *batch,
write_disable_mask |= ISL_CHANNEL_ALPHA_BIT;
}
+ const bool use_clear_address =
+ GEN_GEN >= 10 && (surface->clear_color_addr.buffer != NULL);
+
isl_surf_fill_state(batch->blorp->isl_dev, state,
.surf = &surf, .view = &surface->view,
.aux_surf = &surface->aux_surf, .aux_usage = aux_usage,
.mocs = surface->addr.mocs,
.clear_color = surface->clear_color,
+ .use_clear_address = use_clear_address,
.write_disables = write_disable_mask);
blorp_surface_reloc(batch, state_offset + isl_dev->ss.addr_offset,
@@ -1300,9 +1304,11 @@ blorp_emit_surface_state(struct blorp_batch *batch,
blorp_flush_range(batch, state, GENX(RENDER_SURFACE_STATE_length) * 4);
if (surface->clear_color_addr.buffer) {
-#if GEN_GEN > 10
- unreachable("Implement indirect clear support on gen11+");
-#elif GEN_GEN >= 7 && GEN_GEN <= 10
+#if GEN_GEN >= 10
+ assert((surface->clear_color_addr.offset & 0x3f) == 0);
+ blorp_surface_reloc(batch, state_offset + isl_dev->ss.clear_value_offset,
+ surface->clear_color_addr, 0);
+#elif GEN_GEN >= 7 && GEN_GEN < 10
struct blorp_address dst_addr = blorp_get_surface_base_address(batch);
dst_addr.offset += state_offset + isl_dev->ss.clear_value_offset;
blorp_emit_memcpy(batch, dst_addr, surface->clear_color_addr,
--
2.14.3
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