[Mesa-dev] [PATCH v2 0/5] i965: ASTC5x5 workaround
Rogovin, Kevin
kevin.rogovin at intel.com
Mon Dec 18 08:05:38 UTC 2017
Hi,
I gave it a try by modifying isl_genX(surf_fill_state_s) in src/intel/isl/isl_surface_state.c where I set SamplerL2BypassModeDisable ALWAYS as true for GEN9; sadly car chase continued to hang.
-Kevin
-----Original Message-----
From: Nanley Chery [mailto:nanleychery at gmail.com]
Sent: Friday, December 15, 2017 8:34 PM
To: Rogovin, Kevin <kevin.rogovin at intel.com>
Cc: mesa-dev at lists.freedesktop.org
Subject: Re: [Mesa-dev] [PATCH v2 0/5] i965: ASTC5x5 workaround
On Thu, Dec 14, 2017 at 07:39:46PM +0200, kevin.rogovin at intel.com wrote:
> From: Kevin Rogovin <kevin.rogovin at intel.com>
>
> This patch series implements a needed workaround for Gen9 for ASTC5x5
> sampler reads. The crux of the work around is to make sure that the
> sampler does not read an ASTC5x5 texture and a surface with an
> auxilary buffer without having a texture cache invalidate and command
> streamer stall between such accesses.
>
This workaround sounds like it deals with the same types of surfaces dealt with in the RENDER_SURFACE_STATE field, Sampler L2 Out of Order Mode Disable (or SamplerL2BypassModeDisable in our driver).
Here's the programming note from the SKL PRM on this field:
* This bit must be set for the following surface types:
BC2_UNORM BC3_UNORM BC5_UNORM BC5_SNORM BC7_UNORM
* This bit must be set for surfaces which contain a HiZ auxilliary surface
if other surfaces using AUX_CCS_E or AUX_CCS_D auxiliary surface state
(lossless color compression) are being sampled at the same time.
Have we tried setting this bit for ASTC_5x5 textures?
-Nanley
> With this patch series applied to the (current) master branch of mesa,
> carchase works on my SKL GT4.
>
> v2:
> Rename workaround functions from brw_ to gen9_
> (suggested/requested by Topi Pohjolainen).
>
> Place texture resolve to avoid using auxilary surface
> when ASTC5x5 is detected in brw_predraw_resolve_inputs()
> instead of another detected function; doing so allows
> one to avoid walking the textures again.
> (suggested/requested by Topi Pohjolainen).
>
> Emit command streamer stall in addition to texture
> invalidate.
> (original short-coming caught by Jason Ekstrand)
>
> Place workaround function in (new) dedicated file.
>
> Minor path re-ordering to accomodate changes.
>
> Kevin Rogovin (5):
> i965: define astx5x5 workaround infrastructure
> i965: set ASTC5x5 workaround texture type tracking on texture validate
> i965: use ASTC5x5 workaround in brw_draw
> i965: use ASTC5x5 workaround in brw_compute
> i965: ASTC5x5 workaround logic for blorp
>
> src/mesa/drivers/dri/i965/Makefile.sources | 1 +
> src/mesa/drivers/dri/i965/brw_compute.c | 6 ++++
> src/mesa/drivers/dri/i965/brw_context.c | 6 ++++
> src/mesa/drivers/dri/i965/brw_context.h | 24 ++++++++++++++++
> src/mesa/drivers/dri/i965/brw_draw.c | 16 +++++++++--
> src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 5 ++++
> src/mesa/drivers/dri/i965/gen9_astc5x5_wa.c | 36 ++++++++++++++++++++++++
> src/mesa/drivers/dri/i965/genX_blorp_exec.c | 5 ++++
> src/mesa/drivers/dri/i965/intel_batchbuffer.c | 1 +
> src/mesa/drivers/dri/i965/intel_tex_image.c | 16 ++++++++---
> src/mesa/drivers/dri/i965/intel_tex_validate.c | 13 +++++++++
> src/mesa/drivers/dri/i965/meson.build | 1 +
> 12 files changed, 124 insertions(+), 6 deletions(-) create mode
> 100644 src/mesa/drivers/dri/i965/gen9_astc5x5_wa.c
>
> --
> 2.7.4
>
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