[Mesa-dev] [PATCH] Revert "i965/fs: Use align1 mode on ternary instructions on Gen10+"
Anuj Phogat
anuj.phogat at gmail.com
Fri Dec 22 21:54:08 UTC 2017
This reverts commit 9cd60fce9c22737000a8f8dc711141f8a523fe75.
Above commit caused 2000+ piglit tests to assert fail. Disabling
the align1 mode on gen10 for now to avoid failures.
Cc: Matt Turner <mattst88 at gmail.com>
Cc: Rafael Antognolli <rafael.antognolli at intel.com>
Signed-off-by: Anuj Phogat <anuj.phogat at gmail.com>
---
---
src/intel/compiler/brw_fs_generator.cpp | 12 ++++--------
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp
index 679c1f1916..6a3b2dcf8a 100644
--- a/src/intel/compiler/brw_fs_generator.cpp
+++ b/src/intel/compiler/brw_fs_generator.cpp
@@ -1758,15 +1758,13 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
case BRW_OPCODE_MAD:
assert(devinfo->gen >= 6);
- if (devinfo->gen < 10)
- brw_set_default_access_mode(p, BRW_ALIGN_16);
+ brw_set_default_access_mode(p, BRW_ALIGN_16);
brw_MAD(p, dst, src[0], src[1], src[2]);
break;
case BRW_OPCODE_LRP:
assert(devinfo->gen >= 6);
- if (devinfo->gen < 10)
- brw_set_default_access_mode(p, BRW_ALIGN_16);
+ brw_set_default_access_mode(p, BRW_ALIGN_16);
brw_LRP(p, dst, src[0], src[1], src[2]);
break;
@@ -1864,8 +1862,7 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
case BRW_OPCODE_BFE:
assert(devinfo->gen >= 7);
- if (devinfo->gen < 10)
- brw_set_default_access_mode(p, BRW_ALIGN_16);
+ brw_set_default_access_mode(p, BRW_ALIGN_16);
brw_BFE(p, dst, src[0], src[1], src[2]);
break;
@@ -1875,8 +1872,7 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
break;
case BRW_OPCODE_BFI2:
assert(devinfo->gen >= 7);
- if (devinfo->gen < 10)
- brw_set_default_access_mode(p, BRW_ALIGN_16);
+ brw_set_default_access_mode(p, BRW_ALIGN_16);
brw_BFI2(p, dst, src[0], src[1], src[2]);
break;
--
2.13.3
More information about the mesa-dev
mailing list