[Mesa-dev] [PATCH 4/6] gallium/radeon: fix performance of buffer readbacks

[Marek Olšák]

Please ignore this patch. There are a bunch of piglit regressions.

Marek

On Thu, Feb 9, 2017 at 12:21 PM, Marek Olšák <maraeo at gmail.com> wrote:
> From: Marek Olšák <marek.olsak at amd.com>
>
> We want cached GTT for all non-persistent read mappings.
> Set level = 0 on purpose.
>
> Use dma_copy, because resource_copy_region causes a failure in the PBO
> read of piglit/getteximage-luminance.
>
> If Rocket League used the READ flag, it should get cached GTT.
>
> Cc: 13.0 17.0 <mesa-stable at lists.freedesktop.org>
> ---
>  src/gallium/drivers/radeon/r600_buffer_common.c | 16 ++++++++--------
>  1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/src/gallium/drivers/radeon/r600_buffer_common.c b/src/gallium/drivers/radeon/r600_buffer_common.c
> index da6f020..11d2319 100644
> --- a/src/gallium/drivers/radeon/r600_buffer_common.c
> +++ b/src/gallium/drivers/radeon/r600_buffer_common.c
> @@ -374,38 +374,38 @@ static void *r600_buffer_transfer_map(struct pipe_context *ctx,
>                         if (staging) {
>                                 data += box->x % R600_MAP_BUFFER_ALIGNMENT;
>                                 return r600_buffer_get_transfer(ctx, resource, level, usage, box,
>                                                                 ptransfer, data, staging, offset);
>                         }
>                 } else {
>                         /* At this point, the buffer is always idle (we checked it above). */
>                         usage |= PIPE_TRANSFER_UNSYNCHRONIZED;
>                 }
>         }
> -       /* Using a staging buffer in GTT for larger reads is much faster. */
> +       /* Use a staging buffer in cached GTT for reads. */
>         else if ((usage & PIPE_TRANSFER_READ) &&
> -                !(usage & (PIPE_TRANSFER_WRITE |
> -                           PIPE_TRANSFER_PERSISTENT)) &&
> -                rbuffer->domains & RADEON_DOMAIN_VRAM &&
> +                !(usage & PIPE_TRANSFER_PERSISTENT) &&
> +                (rbuffer->domains & RADEON_DOMAIN_VRAM ||
> +                 rbuffer->flags & RADEON_FLAG_GTT_WC) &&
>                  r600_can_dma_copy_buffer(rctx, 0, box->x, box->width)) {
>                 struct r600_resource *staging;
>
>                 staging = (struct r600_resource*) pipe_buffer_create(
>                                 ctx->screen, 0, PIPE_USAGE_STAGING,
>                                 box->width + (box->x % R600_MAP_BUFFER_ALIGNMENT));
>                 if (staging) {
>                         /* Copy the VRAM buffer to the staging buffer. */
> -                       ctx->resource_copy_region(ctx, &staging->b.b, 0,
> -                                                 box->x % R600_MAP_BUFFER_ALIGNMENT,
> -                                                 0, 0, resource, level, box);
> +                       rctx->dma_copy(ctx, &staging->b.b, 0,
> +                                      box->x % R600_MAP_BUFFER_ALIGNMENT,
> +                                      0, 0, resource, 0, box);
>
> -                       data = r600_buffer_map_sync_with_rings(rctx, staging, PIPE_TRANSFER_READ);
> +                       data = r600_buffer_map_sync_with_rings(rctx, staging, usage);
>                         if (!data) {
>                                 r600_resource_reference(&staging, NULL);
>                                 return NULL;
>                         }
>                         data += box->x % R600_MAP_BUFFER_ALIGNMENT;
>
>                         return r600_buffer_get_transfer(ctx, resource, level, usage, box,
>                                                         ptransfer, data, staging, 0);
>                 }
>         }
> --
> 2.7.4
>