[Mesa-dev] [PATCH] gallium/radeon: include SDMA in the GPU load query

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

---
 src/gallium/drivers/radeon/r600_gpu_load.c    | 10 +++++++++-
 src/gallium/drivers/radeon/r600_pipe_common.h |  3 +++
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeon/r600_gpu_load.c b/src/gallium/drivers/radeon/r600_gpu_load.c
index 3b49118..24f54c0 100644
--- a/src/gallium/drivers/radeon/r600_gpu_load.c
+++ b/src/gallium/drivers/radeon/r600_gpu_load.c
@@ -63,70 +63,78 @@
 
 #define CP_STAT                 0x8680
 #define PFP_BUSY(x)		(((x) >> 15) & 0x1)
 #define MEQ_BUSY(x)		(((x) >> 16) & 0x1)
 #define ME_BUSY(x)		(((x) >> 17) & 0x1)
 #define SURFACE_SYNC_BUSY(x)	(((x) >> 21) & 0x1)
 #define DMA_BUSY(x)		(((x) >> 22) & 0x1)
 #define SCRATCH_RAM_BUSY(x)	(((x) >> 24) & 0x1)
 #define CE_BUSY(x)		(((x) >> 26) & 0x1)
 
+#define IDENTITY(x) x
+
 #define UPDATE_COUNTER(field, mask)					\
 	do {								\
 		if (mask(value))					\
 			p_atomic_inc(&counters->named.field.busy);	\
 		else							\
 			p_atomic_inc(&counters->named.field.idle);	\
 	} while (0)
 
 static void r600_update_mmio_counters(struct r600_common_screen *rscreen,
 				      union r600_mmio_counters *counters)
 {
 	uint32_t value = 0;
+	bool gui_busy, sdma_busy = false;
 
 	/* GRBM_STATUS */
 	rscreen->ws->read_registers(rscreen->ws, GRBM_STATUS, 1, &value);
 
 	UPDATE_COUNTER(ta, TA_BUSY);
 	UPDATE_COUNTER(gds, GDS_BUSY);
 	UPDATE_COUNTER(vgt, VGT_BUSY);
 	UPDATE_COUNTER(ia, IA_BUSY);
 	UPDATE_COUNTER(sx, SX_BUSY);
 	UPDATE_COUNTER(wd, WD_BUSY);
 	UPDATE_COUNTER(spi, SPI_BUSY);
 	UPDATE_COUNTER(bci, BCI_BUSY);
 	UPDATE_COUNTER(sc, SC_BUSY);
 	UPDATE_COUNTER(pa, PA_BUSY);
 	UPDATE_COUNTER(db, DB_BUSY);
 	UPDATE_COUNTER(cp, CP_BUSY);
 	UPDATE_COUNTER(cb, CB_BUSY);
 	UPDATE_COUNTER(gui, GUI_ACTIVE);
+	gui_busy = GUI_ACTIVE(value);
 
 	if (rscreen->chip_class >= EVERGREEN) {
 		/* SRBM_STATUS2 */
 		rscreen->ws->read_registers(rscreen->ws, SRBM_STATUS2, 1, &value);
 
 		UPDATE_COUNTER(sdma, SDMA_BUSY);
+		sdma_busy = SDMA_BUSY(value);
 	}
 
 	if (rscreen->chip_class >= VI) {
 		/* CP_STAT */
 		rscreen->ws->read_registers(rscreen->ws, CP_STAT, 1, &value);
 
 		UPDATE_COUNTER(pfp, PFP_BUSY);
 		UPDATE_COUNTER(meq, MEQ_BUSY);
 		UPDATE_COUNTER(me, ME_BUSY);
 		UPDATE_COUNTER(surf_sync, SURFACE_SYNC_BUSY);
 		UPDATE_COUNTER(dma, DMA_BUSY);
 		UPDATE_COUNTER(scratch_ram, SCRATCH_RAM_BUSY);
 		UPDATE_COUNTER(ce, CE_BUSY);
 	}
+
+	value = gui_busy || sdma_busy;
+	UPDATE_COUNTER(gpu, IDENTITY);
 }
 
 #undef UPDATE_COUNTER
 
 static PIPE_THREAD_ROUTINE(r600_gpu_load_thread, param)
 {
 	struct r600_common_screen *rscreen = (struct r600_common_screen*)param;
 	const int period_us = 1000000 / SAMPLES_PER_SEC;
 	int sleep_us = period_us;
 	int64_t cur_time, last_time = os_time_get();
@@ -209,21 +217,21 @@ static unsigned r600_end_mmio_counter(struct r600_common_screen *rscreen,
 }
 
 #define BUSY_INDEX(rscreen, field) (&rscreen->mmio_counters.named.field.busy - \
 				    rscreen->mmio_counters.array)
 
 static unsigned busy_index_from_type(struct r600_common_screen *rscreen,
 				     unsigned type)
 {
 	switch (type) {
 	case R600_QUERY_GPU_LOAD:
-		return BUSY_INDEX(rscreen, gui);
+		return BUSY_INDEX(rscreen, gpu);
 	case R600_QUERY_GPU_SHADERS_BUSY:
 		return BUSY_INDEX(rscreen, spi);
 	case R600_QUERY_GPU_TA_BUSY:
 		return BUSY_INDEX(rscreen, ta);
 	case R600_QUERY_GPU_GDS_BUSY:
 		return BUSY_INDEX(rscreen, gds);
 	case R600_QUERY_GPU_VGT_BUSY:
 		return BUSY_INDEX(rscreen, vgt);
 	case R600_QUERY_GPU_IA_BUSY:
 		return BUSY_INDEX(rscreen, ia);
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index 6eff9aa..05f3e63 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -352,20 +352,23 @@ struct r600_surface {
 	unsigned db_preload_control;	/* EG and later */
 };
 
 struct r600_mmio_counter {
 	unsigned busy;
 	unsigned idle;
 };
 
 union r600_mmio_counters {
 	struct {
+		/* For global GPU load including SDMA. */
+		struct r600_mmio_counter gpu;
+
 		/* GRBM_STATUS */
 		struct r600_mmio_counter spi;
 		struct r600_mmio_counter gui;
 		struct r600_mmio_counter ta;
 		struct r600_mmio_counter gds;
 		struct r600_mmio_counter vgt;
 		struct r600_mmio_counter ia;
 		struct r600_mmio_counter sx;
 		struct r600_mmio_counter wd;
 		struct r600_mmio_counter bci;
-- 
2.7.4