[Mesa-dev] [PATCH] radeonsi: allow unaligned vertex buffer offsets and strides on CIK-VI

Marek Olšák maraeo at gmail.com
Tue Feb 14 18:50:44 UTC 2017

On Tue, Feb 14, 2017 at 7:24 PM, Matt Arsenault <arsenm2 at gmail.com> wrote:
> On Feb 13, 2017, at 09:01, Marek Olšák <maraeo at gmail.com> wrote:
> So that we can disable u_vbuf for GL core profiles.
> This is a v2 of the previous VI-only patch.
> Is this enabled? I wasn’t sure, so currently LLVM assumes no. You can start
> adding the +unaligned-buffer-access subtarget feature if it is.

Yes, it's enabled on amdgpu (CIK-VI), radeon compute-only (CIK). I
have a patch that will enable it for the radeon graphics queue (CIK).

It's only expected to affect buffer_load_format_{xyzw} instructions
for Mesa, as we get dword-aligned loads in all other cases. It seems
that +unaligned-buffer-access is unnecessary.


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