[Mesa-dev] [PATCH 1/7] i965: Drop dead Gen8+ code from Gen7/sometimes-HSW driver hooks.
Iago Toral
itoral at igalia.com
Fri Feb 17 13:03:25 UTC 2017
And patches 6-7 are also:
Reviewed-by: Iago Toral Quiroga <itoral at igalia.com>
On Fri, 2017-02-17 at 13:21 +0100, Iago Toral wrote:
> Patches 1-5 are:
>
> Reviewed-by: Iago Toral Quiroga <itoral at igalia.com>
>
> On Fri, 2017-02-17 at 01:56 -0800, Kenneth Graunke wrote:
> >
> > These driver hooks are not used when MI_MATH and
> > MI_LOAD_REGISTER_REG
> > are supported, which Gen8+ can always do. So this code is dead.
> >
> > Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
> > ---
> > src/mesa/drivers/dri/i965/gen7_sol_state.c | 50 ++++++++++++++----
> > ------------
> > 1 file changed, 24 insertions(+), 26 deletions(-)
> >
> > diff --git a/src/mesa/drivers/dri/i965/gen7_sol_state.c
> > b/src/mesa/drivers/dri/i965/gen7_sol_state.c
> > index e6b79ed2342..50631610e51 100644
> > --- a/src/mesa/drivers/dri/i965/gen7_sol_state.c
> > +++ b/src/mesa/drivers/dri/i965/gen7_sol_state.c
> > @@ -490,13 +490,11 @@ gen7_begin_transform_feedback(struct
> > gl_context
> > *ctx, GLenum mode,
> > struct brw_transform_feedback_object *brw_obj =
> > (struct brw_transform_feedback_object *) obj;
> >
> > + assert(brw->gen == 7);
> > +
> > /* Reset the SO buffer offsets to 0. */
> > - if (brw->gen >= 8) {
> > - brw_obj->zero_offsets = true;
> > - } else {
> > - intel_batchbuffer_flush(brw);
> > - brw->batch.needs_sol_reset = true;
> > - }
> > + intel_batchbuffer_flush(brw);
> > + brw->batch.needs_sol_reset = true;
> >
> > /* We're about to lose the information needed to compute the
> > number of
> > * vertices written during the last Begin/EndTransformFeedback
> > section,
> > @@ -552,17 +550,17 @@ gen7_pause_transform_feedback(struct
> > gl_context
> > *ctx,
> > /* Flush any drawing so that the counters have the right
> > values.
> > */
> > brw_emit_mi_flush(brw);
> >
> > + assert(brw->gen == 7);
> > +
> > /* Save the SOL buffer offset register values. */
> > - if (brw->gen < 8) {
> > - for (int i = 0; i < 4; i++) {
> > - BEGIN_BATCH(3);
> > - OUT_BATCH(MI_STORE_REGISTER_MEM | (3 - 2));
> > - OUT_BATCH(GEN7_SO_WRITE_OFFSET(i));
> > - OUT_RELOC(brw_obj->offset_bo,
> > - I915_GEM_DOMAIN_INSTRUCTION,
> > I915_GEM_DOMAIN_INSTRUCTION,
> > - i * sizeof(uint32_t));
> > - ADVANCE_BATCH();
> > - }
> > + for (int i = 0; i < 4; i++) {
> > + BEGIN_BATCH(3);
> > + OUT_BATCH(MI_STORE_REGISTER_MEM | (3 - 2));
> > + OUT_BATCH(GEN7_SO_WRITE_OFFSET(i));
> > + OUT_RELOC(brw_obj->offset_bo,
> > + I915_GEM_DOMAIN_INSTRUCTION,
> > I915_GEM_DOMAIN_INSTRUCTION,
> > + i * sizeof(uint32_t));
> > + ADVANCE_BATCH();
> > }
> >
> > /* Store the temporary ending value of the SO_NUM_PRIMS_WRITTEN
> > counters.
> > @@ -581,17 +579,17 @@ gen7_resume_transform_feedback(struct
> > gl_context *ctx,
> > struct brw_transform_feedback_object *brw_obj =
> > (struct brw_transform_feedback_object *) obj;
> >
> > + assert(brw->gen == 7);
> > +
> > /* Reload the SOL buffer offset registers. */
> > - if (brw->gen < 8) {
> > - for (int i = 0; i < 4; i++) {
> > - BEGIN_BATCH(3);
> > - OUT_BATCH(GEN7_MI_LOAD_REGISTER_MEM | (3 - 2));
> > - OUT_BATCH(GEN7_SO_WRITE_OFFSET(i));
> > - OUT_RELOC(brw_obj->offset_bo,
> > - I915_GEM_DOMAIN_INSTRUCTION,
> > I915_GEM_DOMAIN_INSTRUCTION,
> > - i * sizeof(uint32_t));
> > - ADVANCE_BATCH();
> > - }
> > + for (int i = 0; i < 4; i++) {
> > + BEGIN_BATCH(3);
> > + OUT_BATCH(GEN7_MI_LOAD_REGISTER_MEM | (3 - 2));
> > + OUT_BATCH(GEN7_SO_WRITE_OFFSET(i));
> > + OUT_RELOC(brw_obj->offset_bo,
> > + I915_GEM_DOMAIN_INSTRUCTION,
> > I915_GEM_DOMAIN_INSTRUCTION,
> > + i * sizeof(uint32_t));
> > + ADVANCE_BATCH();
> > }
> >
> > /* Store the new starting value of the SO_NUM_PRIMS_WRITTEN
> > counters. */
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