[Mesa-dev] [PATCH 11/16] i965/blorp: Do more fine grained flushing/syncing

[Topi Pohjolainen]

Color clears and resolves now consider end-of-pipe-sync similarly
as normal render path.

Blits remain functionally the same as before. Same as hiz/depth/stencil
clears - they do not have src or dst enabled and therefore current logic
was already no-op.

Later patches will enable blorp blits for texture uploads which
require excess flushing to be omitted in order to perform properly.
Now that clears and blits make the decision independently that also
becomes easier.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/brw_blorp.c       | 48 +++++++++++++++++++++++++++++
 src/mesa/drivers/dri/i965/genX_blorp_exec.c | 11 -------
 2 files changed, 48 insertions(+), 11 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c
index 52f85ff..3247bd4 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -27,6 +27,7 @@
 #include "main/fbobject.h"
 #include "main/renderbuffer.h"
 #include "main/glformats.h"
+#include "util/set.h"
 
 #include "brw_blorp.h"
 #include "brw_context.h"
@@ -334,6 +335,25 @@ physical_to_logical_layer(struct intel_mipmap_tree *mt,
    }
 }
 
+static void
+prepare_blit(struct brw_context *brw,
+             const struct intel_mipmap_tree *src_mt,
+             const struct intel_mipmap_tree *dst_mt)
+{
+   /* Flush the sampler and render caches.  We definitely need to flush the
+    * sampler cache so that we get updated contents from the render cache for
+    * the glBlitFramebuffer() source.  Also, we are sometimes warned in the
+    * docs to flush the cache between reinterpretations of the same surface
+    * data with different formats, which blorp does for stencil and depth
+    * data.
+    */
+   brw_render_cache_set_check_flush(brw, src_mt->bo);
+   brw_render_cache_set_check_flush(brw, dst_mt->bo);
+
+   brw_emit_pipe_control_flush(brw,
+                               PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE);
+}
+
 /**
  * Note: if the src (or dst) is a 2D multisample array texture on Gen7+ using
  * INTEL_MSAA_LAYOUT_UMS or INTEL_MSAA_LAYOUT_CMS, src_layer (dst_layer) is
@@ -859,6 +879,16 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
       }
    }
 
+   const bool is_blorp_pending =
+      irb->mt->mcs_buf && irb->mt->num_samples <= 1 &&
+      _mesa_set_search(brw->render_cache, irb->mt->bo) != NULL;
+
+   if (is_blorp_pending &&
+       fast_clear_state == INTEL_FAST_CLEAR_STATE_RESOLVED) {
+      brw_end_of_pipe_sync(brw);
+      brw_render_cache_set_clear(brw);
+   }
+
    const unsigned num_layers = fb->MaxNumLayers ? irb->layer_count : 1;
 
    /* We can't setup the blorp_surf until we've allocated the MCS above */
@@ -897,6 +927,14 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
       union isl_color_value clear_color;
       memcpy(clear_color.f32, ctx->Color.ClearColor.f, sizeof(float) * 4);
 
+      if (is_blorp_pending &&
+          fast_clear_state == INTEL_FAST_CLEAR_STATE_CLEAR) {
+         brw_emit_pipe_control_flush(brw,
+                                     PIPE_CONTROL_RENDER_TARGET_FLUSH |
+                                     PIPE_CONTROL_CS_STALL);
+         brw_render_cache_set_clear(brw);
+      }
+
       struct blorp_batch batch;
       blorp_batch_init(&brw->blorp, &batch, brw, 0);
       blorp_clear(&batch, &surf,
@@ -960,6 +998,16 @@ brw_blorp_resolve_color(struct brw_context *brw, struct intel_mipmap_tree *mt,
 
    const mesa_format format = _mesa_get_srgb_format_linear(mt->format);
 
+   /* Resolve requires all changes in both auxiliary and color buffer written
+    * out.
+    */
+   if (_mesa_set_search(brw->render_cache, mt->bo)) {
+      brw_emit_pipe_control_flush(brw,
+                                  PIPE_CONTROL_RENDER_TARGET_FLUSH |
+                                  PIPE_CONTROL_CS_STALL);
+      brw_render_cache_set_clear(brw);
+   }
+
    struct isl_surf isl_tmp[2];
    struct blorp_surf surf;
    blorp_surf_for_miptree(brw, &surf, mt, true,
diff --git a/src/mesa/drivers/dri/i965/genX_blorp_exec.c b/src/mesa/drivers/dri/i965/genX_blorp_exec.c
index 37b29cd..de8bc4c 100644
--- a/src/mesa/drivers/dri/i965/genX_blorp_exec.c
+++ b/src/mesa/drivers/dri/i965/genX_blorp_exec.c
@@ -173,17 +173,6 @@ genX(blorp_exec)(struct blorp_batch *batch,
    const uint32_t estimated_max_batch_usage = GEN_GEN >= 8 ? 1800 : 1500;
    bool check_aperture_failed_once = false;
 
-   /* Flush the sampler and render caches.  We definitely need to flush the
-    * sampler cache so that we get updated contents from the render cache for
-    * the glBlitFramebuffer() source.  Also, we are sometimes warned in the
-    * docs to flush the cache between reinterpretations of the same surface
-    * data with different formats, which blorp does for stencil and depth
-    * data.
-    */
-   if (params->src.enabled)
-      brw_render_cache_set_check_flush(brw, params->src.addr.buffer);
-   brw_render_cache_set_check_flush(brw, params->dst.addr.buffer);
-
    brw_select_pipeline(brw, BRW_RENDER_PIPELINE);
 
 retry:
-- 
2.5.5