[Mesa-dev] [PATCH 5/5] radv: Don't flush at the start of a command buffer.

[Bas Nieuwenhuizen]

The preamble flushes now and the rest is the responsibility of the app.

Signed-off-by: Bas Nieuwenhuizen <basni at google.com>
---
 src/amd/vulkan/radv_cmd_buffer.c | 15 ---------------
 1 file changed, 15 deletions(-)

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 5aea0e9de4b..af33bdbb517 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -1637,26 +1637,11 @@ VkResult radv_BeginCommandBuffer(
 	if (cmd_buffer->level == VK_COMMAND_BUFFER_LEVEL_PRIMARY) {
 		switch (cmd_buffer->queue_family_index) {
 		case RADV_QUEUE_GENERAL:
-			/* Flush read caches at the beginning of CS not flushed by the kernel. */
-			cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_INV_ICACHE |
-				RADV_CMD_FLAG_PS_PARTIAL_FLUSH |
-				RADV_CMD_FLAG_CS_PARTIAL_FLUSH |
-				RADV_CMD_FLAG_INV_VMEM_L1 |
-				RADV_CMD_FLAG_INV_SMEM_L1 |
-				RADV_CMD_FLUSH_AND_INV_FRAMEBUFFER |
-				RADV_CMD_FLAG_INV_GLOBAL_L2;
 			emit_gfx_buffer_state(cmd_buffer);
 			radv_set_db_count_control(cmd_buffer);
-			si_emit_cache_flush(cmd_buffer);
 			break;
 		case RADV_QUEUE_COMPUTE:
-			cmd_buffer->state.flush_bits = RADV_CMD_FLAG_INV_ICACHE |
-				RADV_CMD_FLAG_CS_PARTIAL_FLUSH |
-				RADV_CMD_FLAG_INV_VMEM_L1 |
-				RADV_CMD_FLAG_INV_SMEM_L1 |
-				RADV_CMD_FLAG_INV_GLOBAL_L2;
 			si_init_compute(cmd_buffer);
-			si_emit_cache_flush(cmd_buffer);
 			break;
 		case RADV_QUEUE_TRANSFER:
 		default:
-- 
2.11.1