[Mesa-dev] [PATCH 1/3] anv/blorp/i965: blump blorp's pipe controls back into the embedding driver

[Lionel Landwerlin]

At the moment, we don't seem to miss any workaround from having
blorp's pipe controls not tracked by the embedding driver, but this
should make things more robust if something new comes up.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
---
 src/intel/blorp/blorp_genX_exec.h           | 18 ++++++++++++++++--
 src/intel/vulkan/genX_blorp_exec.c          | 10 ++++++++++
 src/mesa/drivers/dri/i965/genX_blorp_exec.c | 19 +++++++++++++++++++
 3 files changed, 45 insertions(+), 2 deletions(-)

diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h
index f0c4f38578..a1f796b6e6 100644
--- a/src/intel/blorp/blorp_genX_exec.h
+++ b/src/intel/blorp/blorp_genX_exec.h
@@ -120,6 +120,20 @@ _blorp_combine_address(struct blorp_batch *batch, void *location,
       _dw + 1; /* Array starts at dw[1] */               \
    })
 
+#define blorp_emit_pipe_control(batch, name)                            \
+   for ( struct GENX(PIPE_CONTROL) name =                               \
+            { GENX(PIPE_CONTROL_header) },                              \
+            *__continue = &name;                                        \
+         __continue != NULL;                                            \
+         ({ genX(blorp_emit_pipe_control(batch, &name));                \
+            __continue = NULL;                                          \
+         }))
+
+#if GEN_GEN >= 8
+static void genX(blorp_emit_pipe_control)(struct blorp_batch *batch,
+                                          const struct GENX(PIPE_CONTROL) *pc);
+#endif
+
 /* 3DSTATE_URB
  * 3DSTATE_URB_VS
  * 3DSTATE_URB_HS
@@ -1317,7 +1331,7 @@ blorp_emit_gen8_hiz_op(struct blorp_batch *batch,
    /* PIPE_CONTROL w/ all bits clear except for “Post-Sync Operation” must set
     * to “Write Immediate Data” enabled.
     */
-   blorp_emit(batch, GENX(PIPE_CONTROL), pc) {
+   blorp_emit_pipe_control(batch, pc) {
       pc.PostSyncOperation = WriteImmediateData;
    }
 
@@ -1325,7 +1339,7 @@ blorp_emit_gen8_hiz_op(struct blorp_batch *batch,
 
    /* Perform depth clear specific flushing */
    if (params->hiz_op == BLORP_HIZ_OP_DEPTH_CLEAR && params->depth.enabled) {
-      blorp_emit(batch, GENX(PIPE_CONTROL), pc) {
+      blorp_emit_pipe_control(batch, pc) {
          pc.DepthStallEnable = true;
          pc.DepthCacheFlushEnable = true;
       }
diff --git a/src/intel/vulkan/genX_blorp_exec.c b/src/intel/vulkan/genX_blorp_exec.c
index c1499fbb72..e2ed7e6d1c 100644
--- a/src/intel/vulkan/genX_blorp_exec.c
+++ b/src/intel/vulkan/genX_blorp_exec.c
@@ -34,6 +34,16 @@
 #include "common/gen_sample_positions.h"
 #include "blorp/blorp_genX_exec.h"
 
+#if GEN_GEN >= 8
+static void
+genX(blorp_emit_pipe_control)(struct blorp_batch *batch,
+                              const struct GENX(PIPE_CONTROL) *pc)
+{
+   void *batch_pc = blorp_emit_dwords(batch, GENX(PIPE_CONTROL_length));
+   GENX(PIPE_CONTROL_pack)(batch, batch_pc, pc);
+}
+#endif
+
 static void *
 blorp_emit_dwords(struct blorp_batch *batch, unsigned n)
 {
diff --git a/src/mesa/drivers/dri/i965/genX_blorp_exec.c b/src/mesa/drivers/dri/i965/genX_blorp_exec.c
index 8e011e98ce..944145aee6 100644
--- a/src/mesa/drivers/dri/i965/genX_blorp_exec.c
+++ b/src/mesa/drivers/dri/i965/genX_blorp_exec.c
@@ -34,6 +34,25 @@
 
 #include "brw_blorp.h"
 
+#if GEN_GEN >= 8
+static void
+genX(blorp_emit_pipe_control)(struct blorp_batch *batch,
+                              const struct GENX(PIPE_CONTROL) *pc)
+{
+   uint32_t dw[GENX(PIPE_CONTROL_length)];
+
+   GENX(PIPE_CONTROL_pack)(batch, dw, pc);
+
+   if (pc->ImmediateData || pc->Address.buffer) {
+      brw_emit_pipe_control_write(batch->driver_batch, dw[1],
+                                  pc->Address.buffer, pc->Address.offset,
+                                  dw[4], dw[5]);
+
+   } else
+      brw_emit_pipe_control_flush(batch->driver_batch, dw[1]);
+}
+#endif
+
 static void *
 blorp_emit_dwords(struct blorp_batch *batch, unsigned n)
 {
-- 
2.11.0