[Mesa-dev] [PATCH 7/8] i965: Do int64 lowering in NIR

[Jason Ekstrand]

---
 src/mesa/drivers/dri/i965/brw_link.cpp | 5 -----
 src/mesa/drivers/dri/i965/brw_nir.c    | 7 +++++++
 2 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_link.cpp b/src/mesa/drivers/dri/i965/brw_link.cpp
index 977feb3..4159756 100644
--- a/src/mesa/drivers/dri/i965/brw_link.cpp
+++ b/src/mesa/drivers/dri/i965/brw_link.cpp
@@ -120,11 +120,6 @@ process_glsl_ir(struct brw_context *brw,
    }
 
    lower_instructions(shader->ir, instructions_to_lower);
-   lower_64bit_integer_instructions(shader->ir,
-                                    MUL64 |
-                                    DIV64 |
-                                    MOD64 |
-                                    SIGN64);
 
    /* Pre-gen6 HW can only nest if-statements 16 deep.  Beyond this,
     * if-statements need to be flattened.
diff --git a/src/mesa/drivers/dri/i965/brw_nir.c b/src/mesa/drivers/dri/i965/brw_nir.c
index 7470349..314adcb 100644
--- a/src/mesa/drivers/dri/i965/brw_nir.c
+++ b/src/mesa/drivers/dri/i965/brw_nir.c
@@ -578,6 +578,13 @@ brw_preprocess_nir(const struct brw_compiler *compiler, nir_shader *nir)
 
    nir_lower_indirect_derefs(nir, indirect_mask);
 
+   nir_lower_int64(nir, nir_lower_imul64 |
+                        nir_lower_isign64 |
+                        nir_lower_udiv64 |
+                        nir_lower_idiv64 |
+                        nir_lower_umod64 |
+                        nir_lower_imod64);
+
    /* Get rid of split copies */
    nir = nir_optimize(nir, compiler, is_scalar);
 
-- 
2.5.0.400.gff86faf