[Mesa-dev] [PATCH 22/24] radeonsi: move SI.vs.load.input building into amd/common

Marek Olšák maraeo at gmail.com
Sat Feb 25 23:58:20 UTC 2017


From: Marek Olšák <marek.olsak at amd.com>

---
 src/amd/common/ac_llvm_build.c           | 17 +++++++++++++++++
 src/amd/common/ac_llvm_build.h           |  6 ++++++
 src/gallium/drivers/radeonsi/si_shader.c | 25 ++++++++++---------------
 3 files changed, 33 insertions(+), 15 deletions(-)

diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index 9435b18..8fac89c 100644
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -723,20 +723,37 @@ ac_build_buffer_load(struct ac_llvm_context *ctx,
 		}
 
 		snprintf(name, sizeof(name), "llvm.SI.buffer.load.dword.%s.%s",
 		         type_names[func], arg_type);
 
 		return ac_emit_llvm_intrinsic(ctx, name, types[func], args,
 					       ARRAY_SIZE(args), AC_FUNC_ATTR_READONLY);
 	}
 }
 
+LLVMValueRef ac_build_buffer_load_format(struct ac_llvm_context *ctx,
+					 LLVMValueRef rsrc,
+					 LLVMValueRef vindex,
+					 LLVMValueRef voffset,
+					 bool readonly_memory)
+{
+	LLVMValueRef args[] = {
+		rsrc,
+		voffset,
+		vindex,
+	};
+	return ac_emit_llvm_intrinsic(ctx, "llvm.SI.vs.load.input",
+				      ctx->v4f32, args, 3,
+				      AC_FUNC_ATTR_READNONE |
+				      AC_FUNC_ATTR_LEGACY);
+}
+
 /**
  * Set range metadata on an instruction.  This can only be used on load and
  * call instructions.  If you know an instruction can only produce the values
  * 0, 1, 2, you would do set_range_metadata(value, 0, 3);
  * \p lo is the minimum value inclusive.
  * \p hi is the maximum value exclusive.
  */
 static void set_range_metadata(struct ac_llvm_context *ctx,
 			       LLVMValueRef value, unsigned lo, unsigned hi)
 {
diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
index aa99e92..ae96d56 100644
--- a/src/amd/common/ac_llvm_build.h
+++ b/src/amd/common/ac_llvm_build.h
@@ -138,20 +138,26 @@ ac_build_buffer_load(struct ac_llvm_context *ctx,
 		     LLVMValueRef rsrc,
 		     int num_channels,
 		     LLVMValueRef vindex,
 		     LLVMValueRef voffset,
 		     LLVMValueRef soffset,
 		     unsigned inst_offset,
 		     unsigned glc,
 		     unsigned slc,
 		     bool readonly_memory);
 
+LLVMValueRef ac_build_buffer_load_format(struct ac_llvm_context *ctx,
+					 LLVMValueRef rsrc,
+					 LLVMValueRef vindex,
+					 LLVMValueRef voffset,
+					 bool readonly_memory);
+
 LLVMValueRef
 ac_get_thread_id(struct ac_llvm_context *ctx);
 
 #define AC_TID_MASK_TOP_LEFT 0xfffffffc
 #define AC_TID_MASK_TOP      0xfffffffd
 #define AC_TID_MASK_LEFT     0xfffffffe
 
 LLVMValueRef
 ac_emit_ddxy(struct ac_llvm_context *ctx,
 	     bool has_ds_bpermute,
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 467d0bd..4705900 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -345,21 +345,20 @@ static void declare_input_vs(
 
 	unsigned chan;
 	unsigned fix_fetch;
 	unsigned num_fetches;
 	unsigned fetch_stride;
 
 	LLVMValueRef t_list_ptr;
 	LLVMValueRef t_offset;
 	LLVMValueRef t_list;
 	LLVMValueRef vertex_index;
-	LLVMValueRef args[3];
 	LLVMValueRef input[3];
 
 	/* Load the T list */
 	t_list_ptr = LLVMGetParam(ctx->main_fn, SI_PARAM_VERTEX_BUFFERS);
 
 	t_offset = lp_build_const_int32(gallivm, input_index);
 
 	t_list = ac_build_indexed_load_const(&ctx->ac, t_list_ptr, t_offset);
 
 	vertex_index = LLVMGetParam(ctx->main_fn,
@@ -386,30 +385,26 @@ static void declare_input_vs(
 	case SI_FIX_FETCH_RGB_16:
 	case SI_FIX_FETCH_RGB_16_INT:
 		num_fetches = 3;
 		fetch_stride = 2;
 		break;
 	default:
 		num_fetches = 1;
 		fetch_stride = 0;
 	}
 
-	args[0] = t_list;
-	args[2] = vertex_index;
-
 	for (unsigned i = 0; i < num_fetches; i++) {
-		args[1] = LLVMConstInt(ctx->i32, fetch_stride * i, 0);
+		LLVMValueRef voffset = LLVMConstInt(ctx->i32, fetch_stride * i, 0);
 
-		input[i] = lp_build_intrinsic(gallivm->builder,
-			"llvm.SI.vs.load.input", ctx->v4f32, args, 3,
-			LP_FUNC_ATTR_READNONE |
-			LP_FUNC_ATTR_LEGACY);
+		input[i] = ac_build_buffer_load_format(&ctx->ac, t_list,
+						       vertex_index, voffset,
+						       true);
 	}
 
 	/* Break up the vec4 into individual components */
 	for (chan = 0; chan < 4; chan++) {
 		LLVMValueRef llvm_chan = lp_build_const_int32(gallivm, chan);
 		out[chan] = LLVMBuildExtractElement(gallivm->builder,
 						    input[0], llvm_chan, "");
 	}
 
 	switch (fix_fetch) {
@@ -4755,32 +4750,32 @@ static void si_lower_gather4_integer(struct si_shader_context *ctx,
 	}
 
 	args->addr = coord;
 }
 
 static void build_tex_intrinsic(const struct lp_build_tgsi_action *action,
 				struct lp_build_tgsi_context *bld_base,
 				struct lp_build_emit_data *emit_data)
 {
 	struct si_shader_context *ctx = si_shader_context(bld_base);
-	struct lp_build_context *base = &bld_base->base;
 	const struct tgsi_full_instruction *inst = emit_data->inst;
 	struct ac_image_args args;
 	unsigned opcode = inst->Instruction.Opcode;
 	unsigned target = inst->Texture.Texture;
 
 	if (target == TGSI_TEXTURE_BUFFER) {
-		emit_data->output[emit_data->chan] = lp_build_intrinsic(
-			base->gallivm->builder,
-			"llvm.SI.vs.load.input", emit_data->dst_type,
-			emit_data->args, emit_data->arg_count,
-			LP_FUNC_ATTR_READNONE | LP_FUNC_ATTR_LEGACY);
+		emit_data->output[emit_data->chan] =
+			ac_build_buffer_load_format(&ctx->ac,
+						    emit_data->args[0],
+						    emit_data->args[2],
+						    emit_data->args[1],
+						    true);
 		return;
 	}
 
 	memcpy(&args, emit_data->args, sizeof(args)); /* ugly */
 
 	args.opcode = ac_image_sample;
 	args.compare = tgsi_is_shadow_target(target);
 	args.offset = inst->Texture.NumOffsets > 0;
 
 	switch (opcode) {
-- 
2.7.4



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