[Mesa-dev] [PATCH v2 42/73] radeonsi/nir: implement ac_shader_abi::load_sampler_desc
Nicolai Hähnle
nhaehnle at gmail.com
Wed Jul 5 10:48:26 UTC 2017
From: Nicolai Hähnle <nicolai.haehnle at amd.com>
---
src/gallium/drivers/radeonsi/si_shader_internal.h | 4 +++
src/gallium/drivers/radeonsi/si_shader_nir.c | 32 +++++++++++++++++++++++
src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c | 26 +++++++++---------
3 files changed, 49 insertions(+), 13 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader_internal.h b/src/gallium/drivers/radeonsi/si_shader_internal.h
index d4358bd..e1212be 100644
--- a/src/gallium/drivers/radeonsi/si_shader_internal.h
+++ b/src/gallium/drivers/radeonsi/si_shader_internal.h
@@ -306,20 +306,24 @@ void si_emit_waitcnt(struct si_shader_context *ctx, unsigned simm16);
LLVMValueRef si_get_bounded_indirect_index(struct si_shader_context *ctx,
const struct tgsi_ind_register *ind,
int rel_index, unsigned num);
LLVMTypeRef si_const_array(LLVMTypeRef elem_type, int num_elements);
void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base);
void si_shader_context_init_mem(struct si_shader_context *ctx);
+LLVMValueRef si_load_sampler_desc(struct si_shader_context *ctx,
+ LLVMValueRef list, LLVMValueRef index,
+ enum ac_descriptor_type type);
+
void si_llvm_load_input_vs(
struct si_shader_context *ctx,
unsigned input_index,
LLVMValueRef out[4]);
void si_llvm_load_input_fs(
struct si_shader_context *ctx,
unsigned input_index,
LLVMValueRef out[4]);
bool si_nir_build_llvm(struct si_shader_context *ctx, struct nir_shader *nir);
diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c b/src/gallium/drivers/radeonsi/si_shader_nir.c
index 01eac1c..91796a8 100644
--- a/src/gallium/drivers/radeonsi/si_shader_nir.c
+++ b/src/gallium/drivers/radeonsi/si_shader_nir.c
@@ -335,20 +335,51 @@ static void declare_nir_input_fs(struct si_shader_context *ctx,
out[2] = LLVMGetParam(ctx->main_fn, SI_PARAM_POS_Z_FLOAT);
out[3] = ac_build_fdiv(&ctx->ac, ctx->ac.f32_1,
LLVMGetParam(ctx->main_fn, SI_PARAM_POS_W_FLOAT));
return;
}
si_llvm_load_input_fs(ctx, *fs_attr_idx, out);
(*fs_attr_idx)++;
}
+static LLVMValueRef
+si_nir_load_sampler_desc(struct ac_shader_abi *abi,
+ unsigned descriptor_set, unsigned base_index,
+ unsigned constant_index, LLVMValueRef dynamic_index,
+ enum ac_descriptor_type desc_type)
+{
+ struct si_shader_context *ctx = si_shader_context_from_abi(abi);
+ LLVMBuilderRef builder = ctx->ac.builder;
+ LLVMValueRef list = LLVMGetParam(ctx->main_fn, ctx->param_samplers_and_images);
+ LLVMValueRef index = dynamic_index;
+
+ assert(!descriptor_set);
+
+ if (!index)
+ index = ctx->ac.i32_0;
+
+ index = LLVMBuildAdd(builder, index,
+ LLVMConstInt(ctx->ac.i32, base_index + constant_index, false),
+ "");
+
+ assert(base_index + constant_index < ctx->num_samplers);
+
+ if (dynamic_index)
+ index = si_llvm_bound_index(ctx, index, ctx->num_samplers);
+
+ index = LLVMBuildAdd(ctx->gallivm.builder, index,
+ LLVMConstInt(ctx->i32, SI_NUM_IMAGES / 2, 0), "");
+
+ return si_load_sampler_desc(ctx, list, index, desc_type);
+}
+
bool si_nir_build_llvm(struct si_shader_context *ctx, struct nir_shader *nir)
{
unsigned fs_attr_idx = 0;
nir_foreach_variable(variable, &nir->inputs) {
unsigned attrib_count = glsl_count_attribute_slots(variable->type,
nir->stage == MESA_SHADER_VERTEX);
unsigned input_idx = variable->data.driver_location;
for (unsigned i = 0; i < attrib_count; ++i) {
LLVMValueRef data[4];
@@ -359,15 +390,16 @@ bool si_nir_build_llvm(struct si_shader_context *ctx, struct nir_shader *nir)
declare_nir_input_fs(ctx, variable, i, &fs_attr_idx, data);
for (unsigned chan = 0; chan < 4; chan++) {
ctx->inputs[input_idx + chan] =
LLVMBuildBitCast(ctx->ac.builder, data[chan], ctx->ac.i32, "");
}
}
}
ctx->abi.inputs = &ctx->inputs[0];
+ ctx->abi.load_sampler_desc = si_nir_load_sampler_desc;
ac_nir_translate(&ctx->ac, &ctx->abi, nir, NULL);
return true;
}
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
index 3b50ca5..dc69cbe 100644
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
@@ -1120,45 +1120,45 @@ static void resq_emit(
out = fix_resinfo(ctx, inst->Memory.Texture, out);
}
emit_data->output[emit_data->chan] = out;
}
/**
* Load an image view, fmask view. or sampler state descriptor.
*/
-static LLVMValueRef load_sampler_desc(struct si_shader_context *ctx,
- LLVMValueRef list, LLVMValueRef index,
- enum desc_type type)
+LLVMValueRef si_load_sampler_desc(struct si_shader_context *ctx,
+ LLVMValueRef list, LLVMValueRef index,
+ enum ac_descriptor_type type)
{
struct gallivm_state *gallivm = &ctx->gallivm;
LLVMBuilderRef builder = gallivm->builder;
switch (type) {
- case DESC_IMAGE:
+ case AC_DESC_IMAGE:
/* The image is at [0:7]. */
index = LLVMBuildMul(builder, index, LLVMConstInt(ctx->i32, 2, 0), "");
break;
- case DESC_BUFFER:
+ case AC_DESC_BUFFER:
/* The buffer is in [4:7]. */
index = LLVMBuildMul(builder, index, LLVMConstInt(ctx->i32, 4, 0), "");
index = LLVMBuildAdd(builder, index, ctx->i32_1, "");
list = LLVMBuildPointerCast(builder, list,
si_const_array(ctx->v4i32, 0), "");
break;
- case DESC_FMASK:
+ case AC_DESC_FMASK:
/* The FMASK is at [8:15]. */
index = LLVMBuildMul(builder, index, LLVMConstInt(ctx->i32, 2, 0), "");
index = LLVMBuildAdd(builder, index, ctx->i32_1, "");
break;
- case DESC_SAMPLER:
+ case AC_DESC_SAMPLER:
/* The sampler state is at [12:15]. */
index = LLVMBuildMul(builder, index, LLVMConstInt(ctx->i32, 4, 0), "");
index = LLVMBuildAdd(builder, index, LLVMConstInt(ctx->i32, 3, 0), "");
list = LLVMBuildPointerCast(builder, list,
si_const_array(ctx->v4i32, 0), "");
break;
}
return ac_build_indexed_load_const(&ctx->ac, list, index);
}
@@ -1226,38 +1226,38 @@ static void tex_fetch_ptrs(
LLVMValueRef ptr =
lp_build_emit_fetch_src(bld_base, reg,
TGSI_TYPE_UNSIGNED64, 0);
list = LLVMBuildIntToPtr(builder, ptr,
si_const_array(ctx->v8i32, 0), "");
index = LLVMConstInt(ctx->i32, 0, 0);
}
if (target == TGSI_TEXTURE_BUFFER)
- *res_ptr = load_sampler_desc(ctx, list, index, DESC_BUFFER);
+ *res_ptr = si_load_sampler_desc(ctx, list, index, AC_DESC_BUFFER);
else
- *res_ptr = load_sampler_desc(ctx, list, index, DESC_IMAGE);
+ *res_ptr = si_load_sampler_desc(ctx, list, index, AC_DESC_IMAGE);
if (samp_ptr)
*samp_ptr = NULL;
if (fmask_ptr)
*fmask_ptr = NULL;
if (target == TGSI_TEXTURE_2D_MSAA ||
target == TGSI_TEXTURE_2D_ARRAY_MSAA) {
if (fmask_ptr)
- *fmask_ptr = load_sampler_desc(ctx, list, index,
- DESC_FMASK);
+ *fmask_ptr = si_load_sampler_desc(ctx, list, index,
+ AC_DESC_FMASK);
} else if (target != TGSI_TEXTURE_BUFFER) {
if (samp_ptr) {
- *samp_ptr = load_sampler_desc(ctx, list, index,
- DESC_SAMPLER);
+ *samp_ptr = si_load_sampler_desc(ctx, list, index,
+ AC_DESC_SAMPLER);
*samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
}
}
}
static void txq_fetch_args(
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
--
2.9.3
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