[Mesa-dev] [PATCH 05/10] ac/gpu_info: if clock crystal frequency is 0, print an error and set 1

Marek Olšák maraeo at gmail.com
Mon Jul 10 21:21:40 UTC 2017


From: Marek Olšák <marek.olsak at amd.com>

During bring-up, this is often 0. Prevent automatic disablement of
ARB_timer_query and demotion of the OpenGL version to 3.2 by setting
a non-zero frequency. Print an error message instead.
---
 src/amd/common/ac_gpu_info.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c
index 3f39a08..ced7183 100644
--- a/src/amd/common/ac_gpu_info.c
+++ b/src/amd/common/ac_gpu_info.c
@@ -253,20 +253,24 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev,
 	info->max_sh_per_se = amdinfo->num_shader_arrays_per_engine;
 	info->has_hw_decode =
 		(uvd.available_rings != 0) || (vcn_dec.available_rings != 0);
 	info->uvd_fw_version =
 		uvd.available_rings ? uvd_version : 0;
 	info->vce_fw_version =
 		vce.available_rings ? vce_version : 0;
 	info->has_userptr = true;
 	info->num_render_backends = amdinfo->rb_pipes;
 	info->clock_crystal_freq = amdinfo->gpu_counter_freq;
+	if (!info->clock_crystal_freq) {
+		fprintf(stderr, "amdgpu: clock crystal frequency is 0, timestamps will be wrong\n");
+		info->clock_crystal_freq = 1;
+	}
 	info->tcc_cache_line_size = 64; /* TC L2 line size on GCN */
 	if (info->chip_class == GFX9) {
 		info->num_tile_pipes = 1 << G_0098F8_NUM_PIPES(amdinfo->gb_addr_cfg);
 		info->pipe_interleave_bytes =
 			256 << G_0098F8_PIPE_INTERLEAVE_SIZE_GFX9(amdinfo->gb_addr_cfg);
 	} else {
 		info->num_tile_pipes = cik_get_num_tile_pipes(amdinfo);
 		info->pipe_interleave_bytes =
 			256 << G_0098F8_PIPE_INTERLEAVE_SIZE_GFX6(amdinfo->gb_addr_cfg);
 	}
-- 
2.7.4



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