[Mesa-dev] i965: Prep work for transitioning to ISL
Topi Pohjolainen
topi.pohjolainen at gmail.com
Mon Jul 17 13:34:51 UTC 2017
Here are miscellanious "little" things now and there making
the actual transition cleaner/simpler.
These sit on top of Jason's ccs-modifiers.
Topi Pohjolainen (16):
i965/miptree: Set refcount before failing via _release()
i965/miptree: Use > 1 instead of > 0 to check for multisampling
i965: Mark read-only args as const in intel_miptree_supports_hiz()
i965/tex: Use offset helper instead of accessing table directly
i965: Make irb::mt_layer logical instead of physical
i965/miptree: Do not rely on msaa type to decide if aux is needed
i965/miptree: Check for miptree_create() failures
i965/wm: Use isl for determining vertical slice pitch
i965/miptree: Stop setting total_width/height for existing bo
i965/miptree: Add pitch override for imported buffer objects
i965/miptree: Pass flags instead of explicit tiling to surface creator
i965: Use offset helper in intel_readpixels_tiled_memcpy()
i965/wm: Use level offsets directly
intel/blorp/gen4: Drop cube map flag for single face copy
i965: Refactor check for separate stencil
i965/gen4: Set tile offsets to zero after depth rebase
src/intel/blorp/blorp_blit.c | 8 +-
src/mesa/drivers/dri/i965/brw_blorp.c | 44 ++--------
src/mesa/drivers/dri/i965/brw_misc_state.c | 10 ++-
src/mesa/drivers/dri/i965/brw_tex_layout.c | 2 +-
src/mesa/drivers/dri/i965/brw_wm.c | 8 +-
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 47 ++++++-----
src/mesa/drivers/dri/i965/intel_blit.c | 4 +-
src/mesa/drivers/dri/i965/intel_fbo.c | 3 +-
src/mesa/drivers/dri/i965/intel_fbo.h | 5 --
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 100 ++++++++++++++++++-----
src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 9 --
src/mesa/drivers/dri/i965/intel_pixel_read.c | 7 +-
src/mesa/drivers/dri/i965/intel_tex_image.c | 8 +-
src/mesa/drivers/dri/i965/intel_tex_subimage.c | 6 +-
14 files changed, 150 insertions(+), 111 deletions(-)
--
2.11.0
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