[Mesa-dev] [PATCH 08/16] i965/wm: Use isl for determining vertical slice pitch

Topi Pohjolainen topi.pohjolainen at gmail.com
Mon Jul 17 13:34:59 UTC 2017


This helps to drop dependency to miptree::total_height which is
used in brw_miptree_get_vertical_slice_pitch().

This is also readily compatible once miptree itself is isl
based.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/brw_tex_layout.c       |  2 +-
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 24 ++++++++++++++++++++++--
 src/mesa/drivers/dri/i965/intel_mipmap_tree.h    |  9 ---------
 3 files changed, 23 insertions(+), 12 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c b/src/mesa/drivers/dri/i965/brw_tex_layout.c
index d06d654797..c76e87bc06 100644
--- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
@@ -309,7 +309,7 @@ brw_miptree_get_horizontal_slice_pitch(const struct brw_context *brw,
    }
 }
 
-unsigned
+static unsigned
 brw_miptree_get_vertical_slice_pitch(const struct brw_context *brw,
                                      const struct intel_mipmap_tree *mt,
                                      unsigned level)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index da5c5128c1..55bb61b598 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -1632,6 +1632,27 @@ update_buffer_image_param(struct brw_context *brw,
    param->stride[0] = _mesa_get_format_bytes(u->_ActualFormat);
 }
 
+static unsigned
+get_vertical_slice_pitch(const struct brw_context *brw,
+                         const struct intel_mipmap_tree *mt,
+                         unsigned level)
+{
+   struct isl_surf surf;
+
+   intel_miptree_get_isl_surf(brw, mt, &surf);
+
+   if ((brw->gen < 9 && mt->target == GL_TEXTURE_3D) ||
+       (brw->gen == 4 && mt->target == GL_TEXTURE_CUBE_MAP)) {
+      const struct isl_extent3d image_align_sa =
+         isl_surf_get_image_alignment_sa(&surf);
+
+      return ALIGN_NPOT(minify(surf.phys_level0_sa.height, level),
+                        image_align_sa.h);
+   }
+
+   return surf.array_pitch_el_rows;
+}
+
 static void
 update_texture_image_param(struct brw_context *brw,
                            struct gl_image_unit *u,
@@ -1658,8 +1679,7 @@ update_texture_image_param(struct brw_context *brw,
    param->stride[1] = mt->pitch / mt->cpp;
    param->stride[2] =
       brw_miptree_get_horizontal_slice_pitch(brw, mt, u->Level);
-   param->stride[3] =
-      brw_miptree_get_vertical_slice_pitch(brw, mt, u->Level);
+   param->stride[3] = get_vertical_slice_pitch(brw, mt, u->Level);
 
    if (mt->tiling == I915_TILING_X) {
       /* An X tile is a rectangular block of 512x8 bytes. */
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index 9098c39116..291050d72e 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -986,15 +986,6 @@ brw_miptree_get_horizontal_slice_pitch(const struct brw_context *brw,
                                        const struct intel_mipmap_tree *mt,
                                        unsigned level);
 
-/**
- * Vertical distance from one slice to the next in the two-dimensional miptree
- * layout.
- */
-unsigned
-brw_miptree_get_vertical_slice_pitch(const struct brw_context *brw,
-                                     const struct intel_mipmap_tree *mt,
-                                     unsigned level);
-
 bool
 brw_miptree_layout(struct brw_context *brw,
                    struct intel_mipmap_tree *mt,
-- 
2.11.0



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