[Mesa-dev] [PATCH v2 4/5] i965/vec4: fix can_use_scratch_for_source() to support partial DFs

[Samuel Iglesias Gonsálvez]

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
---
 src/intel/compiler/brw_vec4_reg_allocate.cpp | 16 ++++++++++------
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/src/intel/compiler/brw_vec4_reg_allocate.cpp b/src/intel/compiler/brw_vec4_reg_allocate.cpp
index bed3471159..a6f1070ebd 100644
--- a/src/intel/compiler/brw_vec4_reg_allocate.cpp
+++ b/src/intel/compiler/brw_vec4_reg_allocate.cpp
@@ -301,7 +301,7 @@ vec4_visitor::reg_allocate()
  */
 static bool
 can_use_scratch_for_source(const vec4_instruction *inst, unsigned i,
-                           unsigned scratch_reg)
+                           unsigned scratch_reg, bool partial_df_read)
 {
    assert(inst->src[i].file == VGRF);
    bool prev_inst_read_scratch_reg = false;
@@ -319,12 +319,14 @@ can_use_scratch_for_source(const vec4_instruction *inst, unsigned i,
 
       /* If the previous instruction writes to scratch_reg then we can reuse
        * it if the write is not conditional and the channels we write are
-       * compatible with our read mask
+       * compatible with our read mask.
+       *
+       * Ignore partial DF read case as we will read the data for both vertices.
        */
       if (prev_inst->dst.file == VGRF && prev_inst->dst.nr == scratch_reg) {
          return (!prev_inst->predicate || prev_inst->opcode == BRW_OPCODE_SEL) &&
-                (brw_mask_for_swizzle(inst->src[i].swizzle) &
-                 ~prev_inst->dst.writemask) == 0;
+            ((brw_mask_for_swizzle(inst->src[i].swizzle) &
+              ~prev_inst->dst.writemask) == 0) && !partial_df_read;
       }
 
       /* Skip scratch read/writes so that instructions generated by spilling
@@ -403,7 +405,9 @@ vec4_visitor::evaluate_spill_costs(float *spill_costs, bool *no_spill)
              * previous instruction, in which case we'll just reuse the scratch
              * reg for this instruction.
              */
-            if (!can_use_scratch_for_source(inst, i, inst->src[i].nr)) {
+            bool partial_df_read = inst->exec_size == 4 &&
+               type_sz(inst->src[i].type) == 8;
+            if (!can_use_scratch_for_source(inst, i, inst->src[i].nr, partial_df_read)) {
                spill_costs[inst->src[i].nr] +=
                   loop_scale * spill_cost_for_type(inst->src[i].type);
                if (inst->src[i].reladdr ||
@@ -514,7 +518,7 @@ vec4_visitor::spill_reg(int spill_reg_nr)
       for (unsigned int i = 0; i < 3; i++) {
          if (inst->src[i].file == VGRF && inst->src[i].nr == spill_reg_nr) {
             if (scratch_reg == -1 ||
-                !can_use_scratch_for_source(inst, i, scratch_reg)) {
+                !can_use_scratch_for_source(inst, i, scratch_reg, false)) {
                /* We need to unspill anyway so make sure we read the full vec4
                 * in any case. This way, the cached register can be reused
                 * for consecutive instructions that read different channels of
-- 
2.11.0