[Mesa-dev] [PATCH 19/32] i965/miptree: Take an aux_usage in prepare/finish
Jason Ekstrand
jason at jlekstrand.net
Fri Jul 21 16:14:18 UTC 2017
On July 21, 2017 9:10:32 AM "Pohjolainen, Topi"
<topi.pohjolainen at gmail.com> wrote:
> On Wed, Jul 19, 2017 at 02:01:45PM -0700, Jason Ekstrand wrote:
>> ---
>> src/mesa/drivers/dri/i965/brw_blorp.c | 25 ++++++-------
>> src/mesa/drivers/dri/i965/brw_clear.c | 3 +-
>> src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 53 ++++++++++++++++-----------
>> src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 5 ++-
>> 4 files changed, 48 insertions(+), 38 deletions(-)
>>
>> diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c
>> b/src/mesa/drivers/dri/i965/brw_blorp.c
>> index 04451b4..43745d2 100644
>> --- a/src/mesa/drivers/dri/i965/brw_blorp.c
>> +++ b/src/mesa/drivers/dri/i965/brw_blorp.c
>> @@ -318,17 +318,16 @@ brw_blorp_blit_miptrees(struct brw_context *brw,
>> */
>> if (src_aux_usage == ISL_AUX_USAGE_HIZ)
>> src_aux_usage = ISL_AUX_USAGE_NONE;
>> - const bool src_aux_supported = src_aux_usage != ISL_AUX_USAGE_NONE;
>> const bool src_clear_supported =
>> - src_aux_supported && (src_mt->format == src_format);
>> + src_aux_usage != ISL_AUX_USAGE_NONE && (src_mt->format == src_format);
>> intel_miptree_prepare_access(brw, src_mt, src_level, 1, src_layer, 1,
>> - src_aux_supported, src_clear_supported);
>> + src_aux_usage, src_clear_supported);
>>
>> enum isl_aux_usage dst_aux_usage =
>> intel_miptree_render_aux_usage(brw, dst_mt, encode_srgb);
>> - const bool dst_aux_supported = dst_aux_usage != ISL_AUX_USAGE_NONE;
>> + const bool dst_clear_supported = dst_aux_usage != ISL_AUX_USAGE_NONE;
>> intel_miptree_prepare_access(brw, dst_mt, dst_level, 1, dst_layer, 1,
>> - dst_aux_supported, dst_aux_supported);
>> + dst_aux_usage, dst_clear_supported);
>>
>> struct isl_surf tmp_surfs[2];
>> struct blorp_surf src_surf, dst_surf;
>> @@ -357,7 +356,7 @@ brw_blorp_blit_miptrees(struct brw_context *brw,
>> blorp_batch_finish(&batch);
>>
>> intel_miptree_finish_write(brw, dst_mt, dst_level, dst_layer, 1,
>> - dst_aux_supported);
>> + dst_aux_usage);
>> }
>>
>> void
>> @@ -418,11 +417,9 @@ brw_blorp_copy_miptrees(struct brw_context *brw,
>> }
>>
>> intel_miptree_prepare_access(brw, src_mt, src_level, 1, src_layer, 1,
>> - src_aux_usage != ISL_AUX_USAGE_NONE,
>> - src_clear_supported);
>> + src_aux_usage, src_clear_supported);
>> intel_miptree_prepare_access(brw, dst_mt, dst_level, 1, dst_layer, 1,
>> - dst_aux_usage != ISL_AUX_USAGE_NONE,
>> - dst_clear_supported);
>> + dst_aux_usage, dst_clear_supported);
>>
>> struct isl_surf tmp_surfs[2];
>> struct blorp_surf src_surf, dst_surf;
>> @@ -439,7 +436,7 @@ brw_blorp_copy_miptrees(struct brw_context *brw,
>> blorp_batch_finish(&batch);
>>
>> intel_miptree_finish_write(brw, dst_mt, dst_level, dst_layer, 1,
>> - dst_aux_usage != ISL_AUX_USAGE_NONE);
>> + dst_aux_usage);
>> }
>>
>> static struct intel_mipmap_tree *
>> @@ -1033,7 +1030,8 @@ brw_blorp_clear_depth_stencil(struct brw_context *brw,
>> stencil_mask = ctx->Stencil.WriteMask[0] & 0xff;
>>
>> intel_miptree_prepare_access(brw, stencil_mt, level, 1,
>> - start_layer, num_layers, false, false);
>> + start_layer, num_layers,
>> + ISL_AUX_USAGE_NONE, false);
>>
>> unsigned stencil_level = level;
>> blorp_surf_for_miptree(brw, &stencil_surf, stencil_mt,
>> @@ -1060,7 +1058,8 @@ brw_blorp_clear_depth_stencil(struct brw_context *brw,
>>
>> if (stencil_mask) {
>> intel_miptree_finish_write(brw, stencil_mt, level,
>> - start_layer, num_layers, false);
>> + start_layer, num_layers,
>> + ISL_AUX_USAGE_NONE);
>> }
>> }
>>
>> diff --git a/src/mesa/drivers/dri/i965/brw_clear.c
>> b/src/mesa/drivers/dri/i965/brw_clear.c
>> index 7fbaa3a..dfb9739 100644
>> --- a/src/mesa/drivers/dri/i965/brw_clear.c
>> +++ b/src/mesa/drivers/dri/i965/brw_clear.c
>> @@ -163,7 +163,8 @@ brw_fast_clear_depth(struct gl_context *ctx)
>> */
>> if (mt->fast_clear_color.f32[0] != ctx->Depth.Clear) {
>> intel_miptree_prepare_access(brw, mt, 0, INTEL_REMAINING_LEVELS,
>> - 0, INTEL_REMAINING_LAYERS, true, false);
>> + 0, INTEL_REMAINING_LAYERS,
>> + ISL_AUX_USAGE_HIZ, false);
>> mt->fast_clear_color.f32[0] = ctx->Depth.Clear;
>> }
>>
>> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
>> b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
>> index 097b304..b284af9 100644
>> --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
>> +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
>> @@ -2163,8 +2163,11 @@ intel_miptree_check_color_resolve(const struct
>> brw_context *brw,
>>
>> static enum blorp_fast_clear_op
>> get_ccs_d_resolve_op(enum isl_aux_state aux_state,
>> - bool ccs_supported, bool fast_clear_supported)
>> + enum isl_aux_usage aux_usage,
>> + bool fast_clear_supported)
>> {
>> + const bool ccs_supported = aux_usage != ISL_AUX_USAGE_NONE;
>> +
>> assert(ccs_supported == fast_clear_supported);
>>
>> switch (aux_state) {
>> @@ -2189,8 +2192,11 @@ get_ccs_d_resolve_op(enum isl_aux_state aux_state,
>>
>> static enum blorp_fast_clear_op
>> get_ccs_e_resolve_op(enum isl_aux_state aux_state,
>> - bool ccs_supported, bool fast_clear_supported)
>> + enum isl_aux_usage aux_usage,
>> + bool fast_clear_supported)
>> {
>> + const bool ccs_supported = aux_usage != ISL_AUX_USAGE_NONE;
>> +
>> switch (aux_state) {
>> case ISL_AUX_STATE_CLEAR:
>> case ISL_AUX_STATE_COMPRESSED_CLEAR:
>> @@ -2222,18 +2228,18 @@ static void
>> intel_miptree_prepare_ccs_access(struct brw_context *brw,
>> struct intel_mipmap_tree *mt,
>> uint32_t level, uint32_t layer,
>> - bool aux_supported,
>> + enum isl_aux_usage aux_usage,
>> bool fast_clear_supported)
>> {
>> enum isl_aux_state aux_state = intel_miptree_get_aux_state(mt, level, layer);
>>
>> enum blorp_fast_clear_op resolve_op;
>> if (mt->aux_usage == ISL_AUX_USAGE_CCS_E) {
>> - resolve_op = get_ccs_e_resolve_op(aux_state, aux_supported,
>> + resolve_op = get_ccs_e_resolve_op(aux_state, aux_usage,
>> fast_clear_supported);
>> } else {
>> assert(mt->aux_usage == ISL_AUX_USAGE_CCS_D);
>> - resolve_op = get_ccs_d_resolve_op(aux_state, aux_supported,
>> + resolve_op = get_ccs_d_resolve_op(aux_state, aux_usage,
>> fast_clear_supported);
>> }
>>
>> @@ -2266,8 +2272,9 @@ static void
>> intel_miptree_finish_ccs_write(struct brw_context *brw,
>> struct intel_mipmap_tree *mt,
>> uint32_t level, uint32_t layer,
>> - bool written_with_ccs)
>> + enum isl_aux_usage aux_usage)
>> {
>> + const bool written_with_ccs = aux_usage != ISL_AUX_USAGE_NONE;
>> enum isl_aux_state aux_state = intel_miptree_get_aux_state(mt, level, layer);
>>
>> if (mt->aux_usage == ISL_AUX_USAGE_CCS_E) {
>> @@ -2518,7 +2525,8 @@ intel_miptree_prepare_access(struct brw_context *brw,
>> struct intel_mipmap_tree *mt,
>> uint32_t start_level, uint32_t num_levels,
>> uint32_t start_layer, uint32_t num_layers,
>> - bool aux_supported, bool fast_clear_supported)
>> + enum isl_aux_usage aux_usage,
>> + bool fast_clear_supported)
>> {
>> num_levels = miptree_level_range_length(mt, start_level, num_levels);
>>
>> @@ -2534,8 +2542,7 @@ intel_miptree_prepare_access(struct brw_context *brw,
>> miptree_layer_range_length(mt, 0, start_layer, num_layers);
>> for (uint32_t a = 0; a < level_layers; a++) {
>> intel_miptree_prepare_mcs_access(brw, mt, start_layer + a,
>> - aux_supported,
>> - fast_clear_supported);
>> + aux_usage, fast_clear_supported);
>
> I don't see the signature for intel_miptree_prepare_mcs_access() changing
> is this patch. But now we pass 'aux_usage' instead of bool.
>
>> }
>> break;
>>
>> @@ -2550,8 +2557,8 @@ intel_miptree_prepare_access(struct brw_context *brw,
>> miptree_layer_range_length(mt, level, start_layer, bum_layers);
>> for (uint32_t a = 0; a < level_layers; a++) {
>> intel_miptree_prepare_ccs_access(brw, mt, level,
>> - start_layer + a, aux_supported,
>> - fast_clear_supported);
>> + start_layer + a,
>> + aux_usage, fast_clear_supported);
>> }
>> }
>> break;
>> @@ -2567,7 +2574,7 @@ intel_miptree_prepare_access(struct brw_context *brw,
>> miptree_layer_range_length(mt, level, start_layer, num_layers);
>> for (uint32_t a = 0; a < level_layers; a++) {
>> intel_miptree_prepare_hiz_access(brw, mt, level, start_layer + a,
>> - aux_supported,
>> + aux_usage == ISL_AUX_USAGE_HIZ,
>
> I was expecting this to the same as _ccs() and _mcs() taking 'aux_usage'
> instead of boolean.
Yeah... I could have changed that but it only has two states: hiz and none.
Still, it would probably be better. I'll make the change.
>> fast_clear_supported);
>> }
>> }
>> @@ -2582,7 +2589,7 @@ void
>> intel_miptree_finish_write(struct brw_context *brw,
>> struct intel_mipmap_tree *mt, uint32_t level,
>> uint32_t start_layer, uint32_t num_layers,
>> - bool written_with_aux)
>> + enum isl_aux_usage aux_usage)
>> {
>> num_layers = miptree_layer_range_length(mt, level, start_layer, num_layers);
>>
>> @@ -2593,9 +2600,10 @@ intel_miptree_finish_write(struct brw_context *brw,
>>
>> case ISL_AUX_USAGE_MCS:
>> assert(mt->mcs_buf);
>> + assert(aux_usage == ISL_AUX_USAGE_MCS);
>> for (uint32_t a = 0; a < num_layers; a++) {
>> intel_miptree_finish_mcs_write(brw, mt, start_layer + a,
>> - written_with_aux);
>> + ISL_AUX_USAGE_MCS);
>> }
>> break;
>>
>> @@ -2606,7 +2614,7 @@ intel_miptree_finish_write(struct brw_context *brw,
>>
>> for (uint32_t a = 0; a < num_layers; a++) {
>> intel_miptree_finish_ccs_write(brw, mt, level, start_layer + a,
>> - written_with_aux);
>> + aux_usage);
>> }
>> break;
>>
>> @@ -2616,7 +2624,7 @@ intel_miptree_finish_write(struct brw_context *brw,
>>
>> for (uint32_t a = 0; a < num_layers; a++) {
>> intel_miptree_finish_hiz_write(brw, mt, level, start_layer + a,
>> - written_with_aux);
>> + aux_usage == ISL_AUX_USAGE_HIZ);
>> }
>> break;
>>
>> @@ -2745,8 +2753,7 @@ intel_miptree_prepare_texture_slices(struct
>> brw_context *brw,
>>
>> intel_miptree_prepare_access(brw, mt, start_level, num_levels,
>> start_layer, num_layers,
>> - aux_usage != ISL_AUX_USAGE_NONE,
>> - clear_supported);
>> + aux_usage, clear_supported);
>> if (aux_supported_out)
>> *aux_supported_out = aux_usage != ISL_AUX_USAGE_NONE;
>> }
>> @@ -2769,7 +2776,8 @@ intel_miptree_prepare_image(struct brw_context *brw,
>> {
>> /* The data port doesn't understand any compression */
>> intel_miptree_prepare_access(brw, mt, 0, INTEL_REMAINING_LEVELS,
>> - 0, INTEL_REMAINING_LAYERS, false, false);
>> + 0, INTEL_REMAINING_LAYERS,
>> + ISL_AUX_USAGE_NONE, false);
>> }
>>
>> void
>> @@ -2845,7 +2853,7 @@ intel_miptree_finish_render(struct brw_context *brw,
>> enum isl_aux_usage aux_usage =
>> intel_miptree_render_aux_usage(brw, mt, srgb_enabled);
>> intel_miptree_finish_write(brw, mt, level, start_layer, layer_count,
>> - aux_usage != ISL_AUX_USAGE_NONE);
>> + aux_usage);
>> }
>>
>> void
>> @@ -2854,7 +2862,7 @@ intel_miptree_prepare_depth(struct brw_context *brw,
>> uint32_t start_layer, uint32_t layer_count)
>> {
>> intel_miptree_prepare_access(brw, mt, level, 1, start_layer, layer_count,
>> - mt->hiz_buf != NULL, mt->hiz_buf != NULL);
>> + mt->aux_usage, mt->hiz_buf != NULL);
>> }
>>
>> void
>> @@ -2891,7 +2899,8 @@ intel_miptree_make_shareable(struct brw_context *brw,
>> assert(mt->msaa_layout == INTEL_MSAA_LAYOUT_NONE || mt->num_samples <= 1);
>>
>> intel_miptree_prepare_access(brw, mt, 0, INTEL_REMAINING_LEVELS,
>> - 0, INTEL_REMAINING_LAYERS, false, false);
>> + 0, INTEL_REMAINING_LAYERS,
>> + ISL_AUX_USAGE_NONE, false);
>>
>> if (mt->mcs_buf) {
>> brw_bo_unreference(mt->mcs_buf->bo);
>> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
>> b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
>> index 11402b3..239791f 100644
>> --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
>> +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
>> @@ -858,7 +858,8 @@ intel_miptree_prepare_access(struct brw_context *brw,
>> struct intel_mipmap_tree *mt,
>> uint32_t start_level, uint32_t num_levels,
>> uint32_t start_layer, uint32_t num_layers,
>> - bool aux_supported, bool fast_clear_supported);
>> + enum isl_aux_usage aux_usage,
>> + bool fast_clear_supported);
>>
>> /** Complete a write operation
>> *
>> @@ -884,7 +885,7 @@ void
>> intel_miptree_finish_write(struct brw_context *brw,
>> struct intel_mipmap_tree *mt, uint32_t level,
>> uint32_t start_layer, uint32_t num_layers,
>> - bool written_with_aux);
>> + enum isl_aux_usage aux_usage);
>>
>> /** Get the auxiliary compression state of a miptree slice */
>> enum isl_aux_state
>> --
>> 2.5.0.400.gff86faf
>>
>> _______________________________________________
>> mesa-dev mailing list
>> mesa-dev at lists.freedesktop.org
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