[Mesa-dev] [PATCH 2/2] radeonsi: decrease the number of compiler threads

[Nicolai Hähnle]

Both patches:

Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>

On 25.07.2017 18:34, Marek Olšák wrote:
> This will also go to stable.
> 
> Marek
> 
> On Tue, Jul 25, 2017 at 5:36 PM, Marek Olšák <maraeo at gmail.com> wrote:
>> From: Marek Olšák <marek.olsak at amd.com>
>>
>> ---
>>   src/gallium/drivers/radeonsi/si_pipe.c | 2 +-
>>   src/gallium/drivers/radeonsi/si_pipe.h | 9 +++++++--
>>   2 files changed, 8 insertions(+), 3 deletions(-)
>>
>> diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
>> index 0bc3002..234469f 100644
>> --- a/src/gallium/drivers/radeonsi/si_pipe.c
>> +++ b/src/gallium/drivers/radeonsi/si_pipe.c
>> @@ -963,21 +963,21 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws,
>>          if (!util_queue_init(&sscreen->shader_compiler_queue, "si_shader",
>>                               32, num_compiler_threads,
>>                               UTIL_QUEUE_INIT_RESIZE_IF_FULL)) {
>>                  si_destroy_shader_cache(sscreen);
>>                  FREE(sscreen);
>>                  return NULL;
>>          }
>>
>>          if (!util_queue_init(&sscreen->shader_compiler_queue_low_priority,
>>                               "si_shader_low",
>> -                            32, num_compiler_threads,
>> +                            32, num_compiler_threads_lowprio,
>>                               UTIL_QUEUE_INIT_RESIZE_IF_FULL |
>>                               UTIL_QUEUE_INIT_USE_MINIMUM_PRIORITY)) {
>>                 si_destroy_shader_cache(sscreen);
>>                 FREE(sscreen);
>>                 return NULL;
>>          }
>>
>>          si_handle_env_var_force_family(sscreen);
>>
>>          if (!debug_get_bool_option("RADEON_DISABLE_PERFCOUNTERS", false))
>> diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
>> index c028aba..d25705b 100644
>> --- a/src/gallium/drivers/radeonsi/si_pipe.h
>> +++ b/src/gallium/drivers/radeonsi/si_pipe.h
>> @@ -106,24 +106,29 @@ struct si_screen {
>>           * - Only VS, TCS, TES, PS are cached, out of which only the hw VS
>>           *   variants of VS and TES are cached, so LS and ES aren't.
>>           * - GS and CS aren't cached, but it's certainly possible to cache
>>           *   those as well.
>>           */
>>          mtx_t                   shader_cache_mutex;
>>          struct hash_table               *shader_cache;
>>
>>          /* Shader compiler queue for multithreaded compilation. */
>>          struct util_queue               shader_compiler_queue;
>> -       LLVMTargetMachineRef            tm[4]; /* used by the queue only */
>> +       /* Use at most 3 normal compiler threads on quadcore and better.
>> +        * Hyperthreaded CPUs report the number of threads, but we want
>> +        * the number of cores. */
>> +       LLVMTargetMachineRef            tm[3]; /* used by the queue only */
>>
>>          struct util_queue               shader_compiler_queue_low_priority;
>> -       LLVMTargetMachineRef            tm_low_priority[4];
>> +       /* Use at most 2 low priority threads on quadcore and better.
>> +        * We want to minimize the impact on multithreaded Mesa. */
>> +       LLVMTargetMachineRef            tm_low_priority[2]; /* at most 2 threads */
>>   };
>>
>>   struct si_blend_color {
>>          struct r600_atom                atom;
>>          struct pipe_blend_color         state;
>>   };
>>
>>   struct si_sampler_view {
>>          struct pipe_sampler_view        base;
>>           /* [0..7] = image descriptor
>> --
>> 2.7.4
>>
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