[Mesa-dev] [PATCH 1/6] i965/miptree: Take import tile offset along with intra-tile x, y

[Topi Pohjolainen]

Imported miptrees represent single images in buffer objects that
themselves may contain multiple images (full mipmaps or arrays).
In such case there may be an offset which consists of pointer
to a tile and x,y coordinates giving the start position within that
tile.

Until now callers got only the intra tile x,y offsets but applied
the tile aligned byte offsets directly themselves. This patch
drops applying the byte offset separately and returns it from
intel_miptree_get_tile_offsets() along with the intra tile
offsets.

Note that intel_renderbuffer_get_tile_offsets() calls
intel_miptree_get_tile_offsets().

Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 13 ++++++-------
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c    | 17 +++++++++++++++++
 2 files changed, 23 insertions(+), 7 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index a0ca6ddf98..abf1d29678 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -99,11 +99,11 @@ get_isl_surf(struct brw_context *brw, struct intel_mipmap_tree *mt,
     */
    assert(brw->has_surface_tile_offset);
    assert(view->levels == 1 && view->array_len == 1);
-   assert(*tile_x == 0 && *tile_y == 0);
+   assert(*tile_x == 0 && *tile_y == 0 && *offset == 0);
 
-   *offset += intel_miptree_get_tile_offsets(mt, view->base_level,
-                                             view->base_array_layer,
-                                             tile_x, tile_y);
+   *offset = intel_miptree_get_tile_offsets(mt, view->base_level,
+                                            view->base_array_layer,
+                                            tile_x, tile_y);
 
    /* Minify the logical dimensions of the texture. */
    const unsigned l = view->base_level - mt->first_level;
@@ -976,9 +976,8 @@ gen4_update_renderbuffer_surface(struct brw_context *brw,
 	      format << BRW_SURFACE_FORMAT_SHIFT);
 
    /* reloc */
-   assert(mt->offset % mt->cpp == 0);
-   surf[1] = (intel_renderbuffer_get_tile_offsets(irb, &tile_x, &tile_y) +
-	      mt->bo->offset64 + mt->offset);
+   surf[1] = intel_renderbuffer_get_tile_offsets(irb, &tile_x, &tile_y) +
+	     mt->bo->offset64;
 
    surf[2] = ((rb->Width - 1) << BRW_SURFACE_WIDTH_SHIFT |
 	      (rb->Height - 1) << BRW_SURFACE_HEIGHT_SHIFT);
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index ed7cb8e215..1b42edd285 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -1343,6 +1343,23 @@ intel_miptree_get_tile_offsets(const struct intel_mipmap_tree *mt,
                                uint32_t *tile_x,
                                uint32_t *tile_y)
 {
+   /* First consider the special case where caller wants the very first slice.
+    * In such case there is only possible import offset to consider. This
+    * consists of tile aligned byte offset and intra tile x,y coordinates.
+    */
+   if (level == 0 && slice == 0) {
+      *tile_x = mt->level[0].level_x;
+      *tile_y = mt->level[0].level_y;
+      return mt->offset;
+   }
+
+   /* Only single slices can be imported - mipmapped and arrayed always
+    * start from the beginning of the underlying buffer object.
+    */
+   assert(mt->offset == 0);
+   assert(mt->level[0].level_x == 0);
+   assert(mt->level[0].level_y == 0);
+
    uint32_t x, y;
    uint32_t mask_x, mask_y;
 
-- 
2.11.0