[Mesa-dev] [PATCH 00/16] i965: Write-combine mappings and other performance improvements for non-LLC

[Matt Turner]

On Wed, May 24, 2017 at 1:04 PM, Matt Turner <mattst88 at gmail.com> wrote:
> The series aims to improve performance on non-LLC platforms like Braswell and
> Broxton.
>
> Unsynchronized mappings were not actually unsynchronized on non-LLC platforms,
> hurting Unigine Valley performance quite a lot. That's fixed. We also start
> using write-combining, a feature available since Linux v4.0.
>
> With WC mappings in place, I've also enabled our tiled memcpy fast paths on
> non-LLC platforms. I've done that in three separate patches in order to
> benchmark them independently.
>
> TODO:
>    More benchmarking, include data in commit messages
>    Sort out authorship (lots of these patches have chunks split out of a large
>                         patch from Chris Wilson's brw-batch branch)
>

Thanks a bunch to Chris, Ken, and Daniel for all the good review comments!

1-7, and 12-15 have Reviewed-by tags. I've dropped 16 pending a
WC-aware linear-to-tiled function.

8, 9, and 10 are missing reviews. I think we're good to leave their
contents as is, with an addition to 10's commit message.

I've sent four patches to replace 11 as suggested by Ken, which I
think yields the exact same result.

Thanks!

Additional TODO items picked up from review comments:

Handle cache_coherent flag for dma_buf imports

Handle
    GL_MAP_INVALIDATE_RANGE_BIT
    GL_MAP_INVALIDATE_BUFFER_BIT
    GL_MAP_FLUSH_EXPLICIT_BIT

Move bufmgr->lock into the bo.

Remove map_count

Test for WC mappings only once in the screen

Do clflushing in userspace

Make a WC-aware linear-to-tiled function and use it in
intel_texsubimage_tiled_memcpy()