[Mesa-dev] [PATCH V2 1/2] i965: Add and initialize l3_banks field for gen7+
Francisco Jerez
currojerez at riseup.net
Fri Jun 2 00:16:32 UTC 2017
Anuj Phogat <anuj.phogat at gmail.com> writes:
> This new field helps simplify l3 way size computations
> in next patch.
>
> V2: Initialize the l3_banks to 0 in macros.
>
You don't really need to explicitly initialize things to zero in the
macros, zero is the default struct members are initialized to in C when
an explicit initialization is missing from an aggregate initializer.
With the redundant initializers dropped patch is:
Reviewed-by: Francisco Jerez <currojerez at riseup.net>
> Suggested-by: Francisco Jerez <currojerez at riseup.net>
> Signed-off-by: Anuj Phogat <anuj.phogat at gmail.com>
> Cc: Francisco Jerez <currojerez at riseup.net>
> ---
> src/intel/common/gen_device_info.c | 33 ++++++++++++++++++++++++++++++---
> src/intel/common/gen_device_info.h | 1 +
> 2 files changed, 31 insertions(+), 3 deletions(-)
>
> diff --git a/src/intel/common/gen_device_info.c b/src/intel/common/gen_device_info.c
> index 209b293..250ea17 100644
> --- a/src/intel/common/gen_device_info.c
> +++ b/src/intel/common/gen_device_info.c
> @@ -125,6 +125,7 @@ static const struct gen_device_info gen_device_info_snb_gt2 = {
> .has_hiz_and_separate_stencil = true, \
> .must_use_separate_stencil = true, \
> .has_llc = true, \
> + .l3_banks = 0, \
> .has_pln = true, \
> .has_surface_tile_offset = true, \
> .timebase_scale = 80
> @@ -132,6 +133,7 @@ static const struct gen_device_info gen_device_info_snb_gt2 = {
> static const struct gen_device_info gen_device_info_ivb_gt1 = {
> GEN7_FEATURES, .is_ivybridge = true, .gt = 1,
> .num_slices = 1,
> + .l3_banks = 2,
> .max_vs_threads = 36,
> .max_tcs_threads = 36,
> .max_tes_threads = 36,
> @@ -156,6 +158,7 @@ static const struct gen_device_info gen_device_info_ivb_gt1 = {
> static const struct gen_device_info gen_device_info_ivb_gt2 = {
> GEN7_FEATURES, .is_ivybridge = true, .gt = 2,
> .num_slices = 1,
> + .l3_banks = 4,
> .max_vs_threads = 128,
> .max_tcs_threads = 128,
> .max_tes_threads = 128,
> @@ -180,6 +183,7 @@ static const struct gen_device_info gen_device_info_ivb_gt2 = {
> static const struct gen_device_info gen_device_info_byt = {
> GEN7_FEATURES, .is_baytrail = true, .gt = 1,
> .num_slices = 1,
> + .l3_banks = 1,
> .has_llc = false,
> .max_vs_threads = 36,
> .max_tcs_threads = 36,
> @@ -211,6 +215,7 @@ static const struct gen_device_info gen_device_info_byt = {
> static const struct gen_device_info gen_device_info_hsw_gt1 = {
> HSW_FEATURES, .gt = 1,
> .num_slices = 1,
> + .l3_banks = 2,
> .max_vs_threads = 70,
> .max_tcs_threads = 70,
> .max_tes_threads = 70,
> @@ -235,6 +240,7 @@ static const struct gen_device_info gen_device_info_hsw_gt1 = {
> static const struct gen_device_info gen_device_info_hsw_gt2 = {
> HSW_FEATURES, .gt = 2,
> .num_slices = 1,
> + .l3_banks = 4,
> .max_vs_threads = 280,
> .max_tcs_threads = 256,
> .max_tes_threads = 280,
> @@ -259,6 +265,7 @@ static const struct gen_device_info gen_device_info_hsw_gt2 = {
> static const struct gen_device_info gen_device_info_hsw_gt3 = {
> HSW_FEATURES, .gt = 3,
> .num_slices = 2,
> + .l3_banks = 8,
> .max_vs_threads = 280,
> .max_tcs_threads = 256,
> .max_tes_threads = 280,
> @@ -286,6 +293,7 @@ static const struct gen_device_info gen_device_info_hsw_gt3 = {
> .has_resource_streamer = true, \
> .must_use_separate_stencil = true, \
> .has_llc = true, \
> + .l3_banks = 0, \
> .has_pln = true, \
> .supports_simd16_3src = true, \
> .has_surface_tile_offset = true, \
> @@ -299,6 +307,7 @@ static const struct gen_device_info gen_device_info_hsw_gt3 = {
> static const struct gen_device_info gen_device_info_bdw_gt1 = {
> GEN8_FEATURES, .gt = 1,
> .num_slices = 1,
> + .l3_banks = 2,
> .max_cs_threads = 42,
> .urb = {
> .size = 192,
> @@ -318,6 +327,7 @@ static const struct gen_device_info gen_device_info_bdw_gt1 = {
> static const struct gen_device_info gen_device_info_bdw_gt2 = {
> GEN8_FEATURES, .gt = 2,
> .num_slices = 1,
> + .l3_banks = 4,
> .max_cs_threads = 56,
> .urb = {
> .size = 384,
> @@ -337,6 +347,7 @@ static const struct gen_device_info gen_device_info_bdw_gt2 = {
> static const struct gen_device_info gen_device_info_bdw_gt3 = {
> GEN8_FEATURES, .gt = 3,
> .num_slices = 2,
> + .l3_banks = 8,
> .max_cs_threads = 56,
> .urb = {
> .size = 384,
> @@ -357,6 +368,7 @@ static const struct gen_device_info gen_device_info_chv = {
> GEN8_FEATURES, .is_cherryview = 1, .gt = 1,
> .has_llc = false,
> .num_slices = 1,
> + .l3_banks = 2,
> .max_vs_threads = 80,
> .max_tcs_threads = 80,
> .max_tes_threads = 80,
> @@ -384,6 +396,7 @@ static const struct gen_device_info gen_device_info_chv = {
> .has_resource_streamer = true, \
> .must_use_separate_stencil = true, \
> .has_llc = true, \
> + .l3_banks = 0, \
> .has_pln = true, \
> .supports_simd16_3src = true, \
> .has_surface_tile_offset = true, \
> @@ -413,6 +426,7 @@ static const struct gen_device_info gen_device_info_chv = {
> .gt = 1, \
> .has_llc = false, \
> .num_slices = 1, \
> + .l3_banks = 0, \
> .max_vs_threads = 112, \
> .max_tcs_threads = 112, \
> .max_tes_threads = 112, \
> @@ -457,22 +471,26 @@ static const struct gen_device_info gen_device_info_chv = {
> static const struct gen_device_info gen_device_info_skl_gt1 = {
> GEN9_FEATURES, .gt = 1,
> .num_slices = 1,
> + .l3_banks = 2,
> .urb.size = 192,
> };
>
> static const struct gen_device_info gen_device_info_skl_gt2 = {
> GEN9_FEATURES, .gt = 2,
> .num_slices = 1,
> + .l3_banks = 4,
> };
>
> static const struct gen_device_info gen_device_info_skl_gt3 = {
> GEN9_FEATURES, .gt = 3,
> .num_slices = 2,
> + .l3_banks = 8,
> };
>
> static const struct gen_device_info gen_device_info_skl_gt4 = {
> GEN9_FEATURES, .gt = 4,
> .num_slices = 3,
> + .l3_banks = 12,
> /* From the "L3 Allocation and Programming" documentation:
> *
> * "URB is limited to 1008KB due to programming restrictions. This is not a
> @@ -485,11 +503,13 @@ static const struct gen_device_info gen_device_info_skl_gt4 = {
> };
>
> static const struct gen_device_info gen_device_info_bxt = {
> - GEN9_LP_FEATURES
> + GEN9_LP_FEATURES,
> + .l3_banks = 2,
> };
>
> static const struct gen_device_info gen_device_info_bxt_2x6 = {
> - GEN9_LP_FEATURES_2X6
> + GEN9_LP_FEATURES_2X6,
> + .l3_banks = 1,
> };
> /*
> * Note: for all KBL SKUs, the PRM says SKL for GS entries, not SKL+.
> @@ -504,6 +524,7 @@ static const struct gen_device_info gen_device_info_kbl_gt1 = {
> .max_cs_threads = 7 * 6,
> .urb.size = 192,
> .num_slices = 1,
> + .l3_banks = 2,
> };
>
> static const struct gen_device_info gen_device_info_kbl_gt1_5 = {
> @@ -513,6 +534,7 @@ static const struct gen_device_info gen_device_info_kbl_gt1_5 = {
>
> .max_cs_threads = 7 * 6,
> .num_slices = 1,
> + .l3_banks = 4,
> };
>
> static const struct gen_device_info gen_device_info_kbl_gt2 = {
> @@ -521,6 +543,7 @@ static const struct gen_device_info gen_device_info_kbl_gt2 = {
> .gt = 2,
>
> .num_slices = 1,
> + .l3_banks = 4,
> };
>
> static const struct gen_device_info gen_device_info_kbl_gt3 = {
> @@ -529,6 +552,7 @@ static const struct gen_device_info gen_device_info_kbl_gt3 = {
> .gt = 3,
>
> .num_slices = 2,
> + .l3_banks = 8,
> };
>
> static const struct gen_device_info gen_device_info_kbl_gt4 = {
> @@ -548,12 +572,15 @@ static const struct gen_device_info gen_device_info_kbl_gt4 = {
> */
> .urb.size = 1008 / 3,
> .num_slices = 3,
> + .l3_banks = 12,
> };
>
> static const struct gen_device_info gen_device_info_glk = {
> - GEN9_LP_FEATURES
> + GEN9_LP_FEATURES,
> + .l3_banks = 2,
> };
>
> +/*TODO: Initialize l3_banks when we know the number. */
> static const struct gen_device_info gen_device_info_glk_2x6 = {
> GEN9_LP_FEATURES_2X6
> };
> diff --git a/src/intel/common/gen_device_info.h b/src/intel/common/gen_device_info.h
> index 80676d0..6207630 100644
> --- a/src/intel/common/gen_device_info.h
> +++ b/src/intel/common/gen_device_info.h
> @@ -96,6 +96,7 @@ struct gen_device_info
> * to change, so we program @max_cs_threads as the lower maximum.
> */
> unsigned num_slices;
> + unsigned l3_banks;
> unsigned max_vs_threads; /**< Maximum Vertex Shader threads */
> unsigned max_tcs_threads; /**< Maximum Hull Shader threads */
> unsigned max_tes_threads; /**< Maximum Domain Shader threads */
> --
> 2.9.3
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 212 bytes
Desc: not available
URL: <https://lists.freedesktop.org/archives/mesa-dev/attachments/20170601/9da1068f/attachment.sig>
More information about the mesa-dev
mailing list