[Mesa-dev] [PATCH 09/14] radv: add rb+ support for GFX9
Dave Airlie
airlied at gmail.com
Mon Jun 5 23:14:41 UTC 2017
From: Dave Airlie <airlied at redhat.com>
This adds some rb+ support, as on GFX9 we have to disable
it as per radeonsi.
---
src/amd/vulkan/radv_cmd_buffer.c | 7 +++++++
src/amd/vulkan/radv_device.c | 6 ++++++
src/amd/vulkan/radv_meta_clear.c | 5 +++++
src/amd/vulkan/radv_private.h | 3 +++
4 files changed, 21 insertions(+)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index d078421..4fd0f4c 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -366,6 +366,13 @@ radv_emit_graphics_blend_state(struct radv_cmd_buffer *cmd_buffer,
8);
radeon_set_context_reg(cmd_buffer->cs, R_028808_CB_COLOR_CONTROL, pipeline->graphics.blend.cb_color_control);
radeon_set_context_reg(cmd_buffer->cs, R_028B70_DB_ALPHA_TO_MASK, pipeline->graphics.blend.db_alpha_to_mask);
+
+ if (cmd_buffer->device->physical_device->has_rbplus) {
+ radeon_set_context_reg_seq(cmd_buffer->cs, R_028754_SX_PS_DOWNCONVERT, 3);
+ radeon_emit(cmd_buffer->cs, 0); /* R_028754_SX_PS_DOWNCONVERT */
+ radeon_emit(cmd_buffer->cs, 0); /* R_028758_SX_BLEND_OPT_EPSILON */
+ radeon_emit(cmd_buffer->cs, 0); /* R_02875C_SX_BLEND_OPT_CONTROL */
+ }
}
static void
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 9d510ea..f919a24 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -304,6 +304,12 @@ radv_physical_device_init(struct radv_physical_device *device,
radv_get_device_uuid(drm_device, device->device_uuid);
+ if (device->rad_info.family == CHIP_STONEY ||
+ device->rad_info.chip_class >= GFX9) {
+ device->has_rbplus = true;
+ device->rbplus_allowed = device->rad_info.family == CHIP_STONEY;
+ }
+
return VK_SUCCESS;
fail:
diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c
index 66b77f4..f4cb787 100644
--- a/src/amd/vulkan/radv_meta_clear.c
+++ b/src/amd/vulkan/radv_meta_clear.c
@@ -915,6 +915,11 @@ emit_fast_color_clear(struct radv_cmd_buffer *cmd_buffer,
if (clear_rect->layerCount != iview->image->info.array_size)
goto fail;
+ /* RB+ doesn't work with CMASK fast clear on Stoney. */
+ if (!iview->image->surface.dcc_size &&
+ cmd_buffer->device->physical_device->rad_info.family == CHIP_STONEY)
+ goto fail;
+
/* DCC */
ret = radv_format_pack_clear_color(iview->image->vk_format,
clear_color, &clear_value);
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index 6a6c1e2..ed80ba7 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -273,6 +273,9 @@ struct radv_physical_device {
int local_fd;
struct wsi_device wsi_device;
struct radv_extensions extensions;
+
+ bool has_rbplus; /* if RB+ register exist */
+ bool rbplus_allowed; /* if RB+ is allowed */
};
struct radv_instance {
--
2.9.4
More information about the mesa-dev
mailing list