[Mesa-dev] [PATCH 01/10] i965/blorp: Take a layer range in intel_hiz_exec

[Anuj Phogat]

Patches 1-6, 8 are:
Reviewed-by: Anuj Phogat <anuj.phogat at gmail.com>

On Mon, Jun 5, 2017 at 5:55 PM, Jason Ekstrand <jason at jlekstrand.net> wrote:
> ---
>  src/mesa/drivers/dri/i965/brw_blorp.c         | 13 ++++++++-----
>  src/mesa/drivers/dri/i965/brw_blorp.h         |  3 ++-
>  src/mesa/drivers/dri/i965/brw_clear.c         | 10 ++++------
>  src/mesa/drivers/dri/i965/intel_mipmap_tree.c |  4 ++--
>  src/mesa/drivers/dri/i965/intel_mipmap_tree.h |  4 ----
>  5 files changed, 16 insertions(+), 18 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c
> index 5ea6b0c..0d1ccd3 100644
> --- a/src/mesa/drivers/dri/i965/brw_blorp.c
> +++ b/src/mesa/drivers/dri/i965/brw_blorp.c
> @@ -1007,7 +1007,8 @@ gen6_blorp_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt,
>   */
>  void
>  intel_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt,
> -              unsigned int level, unsigned int layer, enum blorp_hiz_op op)
> +               unsigned int level, unsigned int start_layer,
> +               unsigned int num_layers, enum blorp_hiz_op op)
>  {
>     const char *opname = NULL;
>
> @@ -1026,12 +1027,14 @@ intel_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt,
>        break;
>     }
>
> -   DBG("%s %s to mt %p level %d layer %d\n",
> -       __func__, opname, mt, level, layer);
> +   DBG("%s %s to mt %p level %d layers %d-%d\n",
> +       __func__, opname, mt, level, start_layer, start_layer + num_layers - 1);
>
>     if (brw->gen >= 8) {
> -      gen8_hiz_exec(brw, mt, level, layer, op);
> +      for (unsigned a = 0; a < num_layers; a++)
> +         gen8_hiz_exec(brw, mt, level, start_layer + a, op);
>     } else {
> -      gen6_blorp_hiz_exec(brw, mt, level, layer, op);
> +      for (unsigned a = 0; a < num_layers; a++)
> +         gen6_blorp_hiz_exec(brw, mt, level, start_layer + a, op);
>     }
>  }
> diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h
> index 8743d96..91a2d41 100644
> --- a/src/mesa/drivers/dri/i965/brw_blorp.h
> +++ b/src/mesa/drivers/dri/i965/brw_blorp.h
> @@ -70,7 +70,8 @@ brw_blorp_resolve_color(struct brw_context *brw,
>
>  void
>  intel_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt,
> -              unsigned int level, unsigned int layer, enum blorp_hiz_op op);
> +               unsigned int level, unsigned int start_layer,
> +               unsigned int num_layers, enum blorp_hiz_op op);
>
>  void gen4_blorp_exec(struct blorp_batch *batch,
>                       const struct blorp_params *params);
> diff --git a/src/mesa/drivers/dri/i965/brw_clear.c b/src/mesa/drivers/dri/i965/brw_clear.c
> index adaf250..f42ea38 100644
> --- a/src/mesa/drivers/dri/i965/brw_clear.c
> +++ b/src/mesa/drivers/dri/i965/brw_clear.c
> @@ -208,13 +208,11 @@ brw_fast_clear_depth(struct gl_context *ctx)
>     }
>
>     if (fb->MaxNumLayers > 0) {
> -      for (unsigned layer = 0; layer < depth_irb->layer_count; layer++) {
> -         intel_hiz_exec(brw, mt, depth_irb->mt_level,
> -                        depth_irb->mt_layer + layer,
> -                        BLORP_HIZ_OP_DEPTH_CLEAR);
> -      }
> +      intel_hiz_exec(brw, mt, depth_irb->mt_level,
> +                     depth_irb->mt_layer, depth_irb->layer_count,
> +                     BLORP_HIZ_OP_DEPTH_CLEAR);
>     } else {
> -      intel_hiz_exec(brw, mt, depth_irb->mt_level, depth_irb->mt_layer,
> +      intel_hiz_exec(brw, mt, depth_irb->mt_level, depth_irb->mt_layer, 1,
>                       BLORP_HIZ_OP_DEPTH_CLEAR);
>     }
>
> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> index a499eb39..aa4a81d 100644
> --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> @@ -1987,7 +1987,7 @@ intel_miptree_slice_resolve(struct brw_context *brw,
>     if (!item || item->need != need)
>        return false;
>
> -   intel_hiz_exec(brw, mt, level, layer, need);
> +   intel_hiz_exec(brw, mt, level, layer, 1, need);
>     intel_resolve_map_remove(item);
>     return true;
>  }
> @@ -2023,7 +2023,7 @@ intel_miptree_all_slices_resolve(struct brw_context *brw,
>        if (map->need != need)
>          continue;
>
> -      intel_hiz_exec(brw, mt, map->level, map->layer, need);
> +      intel_hiz_exec(brw, mt, map->level, map->layer, 1, need);
>        intel_resolve_map_remove(map);
>        did_resolve = true;
>     }
> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
> index 546d904..b3bd70d 100644
> --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
> +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
> @@ -1001,10 +1001,6 @@ intel_miptree_unmap(struct brw_context *brw,
>                     unsigned int level,
>                     unsigned int slice);
>
> -void
> -intel_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt,
> -              unsigned int level, unsigned int layer, enum blorp_hiz_op op);
> -
>  bool
>  intel_miptree_sample_with_hiz(struct brw_context *brw,
>                                struct intel_mipmap_tree *mt);
> --
> 2.5.0.400.gff86faf
>
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