[Mesa-dev] [PATCH 18/24] i965/cnl: Implement depth count workaround

[Jason Ekstrand]

Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

On Fri, May 12, 2017 at 4:38 PM, Anuj Phogat <anuj.phogat at gmail.com> wrote:

> From: Ben Widawsky <benjamin.widawsky at intel.com>
>
> Signed-off-by: Ben Widawsky <benjamin.widawsky at intel.com>
> ---
>  src/mesa/drivers/dri/i965/brw_queryobj.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_queryobj.c
> b/src/mesa/drivers/dri/i965/brw_queryobj.c
> index de93b8b..0a830ae 100644
> --- a/src/mesa/drivers/dri/i965/brw_queryobj.c
> +++ b/src/mesa/drivers/dri/i965/brw_queryobj.c
> @@ -111,6 +111,14 @@ brw_write_depth_count(struct brw_context *brw, struct
> brw_bo *query_bo, int idx)
>     if (brw->gen == 9 && brw->gt == 4)
>        flags |= PIPE_CONTROL_CS_STALL;
>
> +   if (brw->gen >= 10) {
> +      /* "Driver must program PIPE_CONTROL with only Depth Stall Enable
> bit set
> +       * prior to programming a PIPE_CONTROL with Write PS Depth Count
> Post sync
> +       * operation."
> +       */
> +      brw_emit_pipe_control_flush(brw, PIPE_CONTROL_DEPTH_STALL);
> +   }
> +
>     brw_emit_pipe_control_write(brw, flags,
>                                 query_bo, idx * sizeof(uint64_t),
>                                 0, 0);
> --
> 2.9.3
>
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