[Mesa-dev] [RFC 4/9] tgsi: populate precise
Nicolai Hähnle
nhaehnle at gmail.com
Mon Jun 12 10:33:52 UTC 2017
On 11.06.2017 20:42, Karol Herbst wrote:
> Only implemented for glsl->tgsi. Other converters just set precise to 0.
>
> Signed-off-by: Karol Herbst <karolherbst at gmail.com>
> ---
> src/gallium/auxiliary/tgsi/tgsi_build.c | 3 +++
> src/gallium/auxiliary/tgsi/tgsi_ureg.c | 14 +++++++---
> src/gallium/auxiliary/tgsi/tgsi_ureg.h | 20 +++++++++++---
> src/gallium/auxiliary/util/u_simple_shaders.c | 2 +-
> src/gallium/state_trackers/nine/nine_shader.c | 6 ++---
> src/mesa/state_tracker/st_atifs_to_tgsi.c | 38 +++++++++++++--------------
> src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 12 ++++-----
> src/mesa/state_tracker/st_mesa_to_tgsi.c | 8 +++---
> src/mesa/state_tracker/st_pbo.c | 2 +-
> 9 files changed, 65 insertions(+), 40 deletions(-)
>
> diff --git a/src/gallium/auxiliary/tgsi/tgsi_build.c b/src/gallium/auxiliary/tgsi/tgsi_build.c
> index 55e4d064ed..144a017768 100644
> --- a/src/gallium/auxiliary/tgsi/tgsi_build.c
> +++ b/src/gallium/auxiliary/tgsi/tgsi_build.c
> @@ -651,6 +651,7 @@ tgsi_default_instruction( void )
> static struct tgsi_instruction
> tgsi_build_instruction(unsigned opcode,
> unsigned saturate,
> + unsigned precise,
> unsigned num_dst_regs,
> unsigned num_src_regs,
> struct tgsi_header *header)
> @@ -665,6 +666,7 @@ tgsi_build_instruction(unsigned opcode,
> instruction = tgsi_default_instruction();
> instruction.Opcode = opcode;
> instruction.Saturate = saturate;
> + instruction.Precise = precise;
> instruction.NumDstRegs = num_dst_regs;
> instruction.NumSrcRegs = num_src_regs;
>
> @@ -1061,6 +1063,7 @@ tgsi_build_full_instruction(
>
> *instruction = tgsi_build_instruction(full_inst->Instruction.Opcode,
> full_inst->Instruction.Saturate,
> + full_inst->Instruction.Precise,
> full_inst->Instruction.NumDstRegs,
> full_inst->Instruction.NumSrcRegs,
> header);
> diff --git a/src/gallium/auxiliary/tgsi/tgsi_ureg.c b/src/gallium/auxiliary/tgsi/tgsi_ureg.c
> index 5bd779728a..56db2252c5 100644
> --- a/src/gallium/auxiliary/tgsi/tgsi_ureg.c
> +++ b/src/gallium/auxiliary/tgsi/tgsi_ureg.c
> @@ -1213,6 +1213,7 @@ struct ureg_emit_insn_result
> ureg_emit_insn(struct ureg_program *ureg,
> unsigned opcode,
> boolean saturate,
> + unsigned precise,
> unsigned num_dst,
> unsigned num_src)
> {
> @@ -1226,6 +1227,7 @@ ureg_emit_insn(struct ureg_program *ureg,
> out[0].insn = tgsi_default_instruction();
> out[0].insn.Opcode = opcode;
> out[0].insn.Saturate = saturate;
> + out[0].insn.Precise = precise;
> out[0].insn.NumDstRegs = num_dst;
> out[0].insn.NumSrcRegs = num_src;
>
> @@ -1354,7 +1356,8 @@ ureg_insn(struct ureg_program *ureg,
> const struct ureg_dst *dst,
> unsigned nr_dst,
> const struct ureg_src *src,
> - unsigned nr_src )
> + unsigned nr_src,
> + unsigned precise )
> {
> struct ureg_emit_insn_result insn;
> unsigned i;
> @@ -1369,6 +1372,7 @@ ureg_insn(struct ureg_program *ureg,
> insn = ureg_emit_insn(ureg,
> opcode,
> saturate,
> + precise,
> nr_dst,
> nr_src);
>
> @@ -1391,7 +1395,8 @@ ureg_tex_insn(struct ureg_program *ureg,
> const struct tgsi_texture_offset *texoffsets,
> unsigned nr_offset,
> const struct ureg_src *src,
> - unsigned nr_src )
> + unsigned nr_src,
> + unsigned precise )
What does `precise' mean for tex instructions?
> {
> struct ureg_emit_insn_result insn;
> unsigned i;
> @@ -1406,6 +1411,7 @@ ureg_tex_insn(struct ureg_program *ureg,
> insn = ureg_emit_insn(ureg,
> opcode,
> saturate,
> + precise,
> nr_dst,
> nr_src);
>
> @@ -1434,7 +1440,8 @@ ureg_memory_insn(struct ureg_program *ureg,
> unsigned nr_src,
> unsigned qualifier,
> unsigned texture,
> - unsigned format)
> + unsigned format,
> + unsigned precise)
Same question. I can't think of a possible meaning, in which case the
parameter should be dropped.
Cheers,
Nicolai
> {
> struct ureg_emit_insn_result insn;
> unsigned i;
> @@ -1442,6 +1449,7 @@ ureg_memory_insn(struct ureg_program *ureg,
> insn = ureg_emit_insn(ureg,
> opcode,
> FALSE,
> + precise,
> nr_dst,
> nr_src);
>
> diff --git a/src/gallium/auxiliary/tgsi/tgsi_ureg.h b/src/gallium/auxiliary/tgsi/tgsi_ureg.h
> index 54f95ba565..105c85abd5 100644
> --- a/src/gallium/auxiliary/tgsi/tgsi_ureg.h
> +++ b/src/gallium/auxiliary/tgsi/tgsi_ureg.h
> @@ -546,7 +546,8 @@ ureg_insn(struct ureg_program *ureg,
> const struct ureg_dst *dst,
> unsigned nr_dst,
> const struct ureg_src *src,
> - unsigned nr_src );
> + unsigned nr_src,
> + unsigned precise);
>
>
> void
> @@ -559,7 +560,8 @@ ureg_tex_insn(struct ureg_program *ureg,
> const struct tgsi_texture_offset *texoffsets,
> unsigned nr_offset,
> const struct ureg_src *src,
> - unsigned nr_src );
> + unsigned nr_src,
> + unsigned precise);
>
>
> void
> @@ -571,7 +573,8 @@ ureg_memory_insn(struct ureg_program *ureg,
> unsigned nr_src,
> unsigned qualifier,
> unsigned texture,
> - unsigned format);
> + unsigned format,
> + unsigned precise);
>
> /***********************************************************************
> * Internal instruction helpers, don't call these directly:
> @@ -586,6 +589,7 @@ struct ureg_emit_insn_result
> ureg_emit_insn(struct ureg_program *ureg,
> unsigned opcode,
> boolean saturate,
> + unsigned precise,
> unsigned num_dst,
> unsigned num_src);
>
> @@ -632,6 +636,7 @@ static inline void ureg_##op( struct ureg_program *ureg ) \
> opcode, \
> FALSE, \
> 0, \
> + 0, \
> 0); \
> ureg_fixup_insn_size( ureg, insn.insn_token ); \
> }
> @@ -646,6 +651,7 @@ static inline void ureg_##op( struct ureg_program *ureg, \
> opcode, \
> FALSE, \
> 0, \
> + 0, \
> 1); \
> ureg_emit_src( ureg, src ); \
> ureg_fixup_insn_size( ureg, insn.insn_token ); \
> @@ -661,6 +667,7 @@ static inline void ureg_##op( struct ureg_program *ureg, \
> opcode, \
> FALSE, \
> 0, \
> + 0, \
> 0); \
> ureg_emit_label( ureg, insn.extended_token, label_token ); \
> ureg_fixup_insn_size( ureg, insn.insn_token ); \
> @@ -677,6 +684,7 @@ static inline void ureg_##op( struct ureg_program *ureg, \
> opcode, \
> FALSE, \
> 0, \
> + 0, \
> 1); \
> ureg_emit_label( ureg, insn.extended_token, label_token ); \
> ureg_emit_src( ureg, src ); \
> @@ -694,6 +702,7 @@ static inline void ureg_##op( struct ureg_program *ureg, \
> insn = ureg_emit_insn(ureg, \
> opcode, \
> dst.Saturate, \
> + 0, \
> 1, \
> 0); \
> ureg_emit_dst( ureg, dst ); \
> @@ -713,6 +722,7 @@ static inline void ureg_##op( struct ureg_program *ureg, \
> insn = ureg_emit_insn(ureg, \
> opcode, \
> dst.Saturate, \
> + 0, \
> 1, \
> 1); \
> ureg_emit_dst( ureg, dst ); \
> @@ -733,6 +743,7 @@ static inline void ureg_##op( struct ureg_program *ureg, \
> insn = ureg_emit_insn(ureg, \
> opcode, \
> dst.Saturate, \
> + 0, \
> 1, \
> 2); \
> ureg_emit_dst( ureg, dst ); \
> @@ -756,6 +767,7 @@ static inline void ureg_##op( struct ureg_program *ureg, \
> insn = ureg_emit_insn(ureg, \
> opcode, \
> dst.Saturate, \
> + 0, \
> 1, \
> 2); \
> ureg_emit_texture( ureg, insn.extended_token, target, \
> @@ -780,6 +792,7 @@ static inline void ureg_##op( struct ureg_program *ureg, \
> insn = ureg_emit_insn(ureg, \
> opcode, \
> dst.Saturate, \
> + 0, \
> 1, \
> 3); \
> ureg_emit_dst( ureg, dst ); \
> @@ -806,6 +819,7 @@ static inline void ureg_##op( struct ureg_program *ureg, \
> insn = ureg_emit_insn(ureg, \
> opcode, \
> dst.Saturate, \
> + 0, \
> 1, \
> 4); \
> ureg_emit_texture( ureg, insn.extended_token, target, \
> diff --git a/src/gallium/auxiliary/util/u_simple_shaders.c b/src/gallium/auxiliary/util/u_simple_shaders.c
> index 5874d0e9aa..79331b5638 100644
> --- a/src/gallium/auxiliary/util/u_simple_shaders.c
> +++ b/src/gallium/auxiliary/util/u_simple_shaders.c
> @@ -954,7 +954,7 @@ util_make_geometry_passthrough_shader(struct pipe_context *pipe,
> }
>
> /* EMIT IMM[0] */
> - ureg_insn(ureg, TGSI_OPCODE_EMIT, NULL, 0, &imm, 1);
> + ureg_insn(ureg, TGSI_OPCODE_EMIT, NULL, 0, &imm, 1, 0);
>
> /* END */
> ureg_END(ureg);
> diff --git a/src/gallium/state_trackers/nine/nine_shader.c b/src/gallium/state_trackers/nine/nine_shader.c
> index 40fb6be88f..f405090811 100644
> --- a/src/gallium/state_trackers/nine/nine_shader.c
> +++ b/src/gallium/state_trackers/nine/nine_shader.c
> @@ -1879,7 +1879,7 @@ DECL_SPECIAL(IFC)
> struct ureg_dst tmp = ureg_writemask(tx_scratch(tx), TGSI_WRITEMASK_X);
> src[0] = tx_src_param(tx, &tx->insn.src[0]);
> src[1] = tx_src_param(tx, &tx->insn.src[1]);
> - ureg_insn(tx->ureg, cmp_op, &tmp, 1, src, 2);
> + ureg_insn(tx->ureg, cmp_op, &tmp, 1, src, 2, 0);
> ureg_IF(tx->ureg, ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_X), tx_cond(tx));
> return D3D_OK;
> }
> @@ -1897,7 +1897,7 @@ DECL_SPECIAL(BREAKC)
> struct ureg_dst tmp = ureg_writemask(tx_scratch(tx), TGSI_WRITEMASK_X);
> src[0] = tx_src_param(tx, &tx->insn.src[0]);
> src[1] = tx_src_param(tx, &tx->insn.src[1]);
> - ureg_insn(tx->ureg, cmp_op, &tmp, 1, src, 2);
> + ureg_insn(tx->ureg, cmp_op, &tmp, 1, src, 2, 0);
> ureg_IF(tx->ureg, ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_X), tx_cond(tx));
> ureg_BRK(tx->ureg);
> tx_endcond(tx);
> @@ -3029,7 +3029,7 @@ NineTranslateInstruction_Generic(struct shader_translator *tx)
>
> ureg_insn(tx->ureg, tx->insn.info->opcode,
> dst, tx->insn.ndst,
> - src, tx->insn.nsrc);
> + src, tx->insn.nsrc, 0);
> return D3D_OK;
> }
>
> diff --git a/src/mesa/state_tracker/st_atifs_to_tgsi.c b/src/mesa/state_tracker/st_atifs_to_tgsi.c
> index 338ced56ed..e0a6ff7131 100644
> --- a/src/mesa/state_tracker/st_atifs_to_tgsi.c
> +++ b/src/mesa/state_tracker/st_atifs_to_tgsi.c
> @@ -105,18 +105,18 @@ apply_swizzle(struct st_translate *t,
> imm[0] = src;
> imm[1] = ureg_imm4f(t->ureg, 1.0f, 1.0f, 0.0f, 0.0f);
> imm[2] = ureg_imm4f(t->ureg, 0.0f, 0.0f, 1.0f, 1.0f);
> - ureg_insn(t->ureg, TGSI_OPCODE_MAD, &tmp[0], 1, imm, 3);
> + ureg_insn(t->ureg, TGSI_OPCODE_MAD, &tmp[0], 1, imm, 3, 0);
>
> if (swizzle == GL_SWIZZLE_STR_DR_ATI) {
> imm[0] = ureg_scalar(src, TGSI_SWIZZLE_Z);
> } else {
> imm[0] = ureg_scalar(src, TGSI_SWIZZLE_W);
> }
> - ureg_insn(t->ureg, TGSI_OPCODE_RCP, &tmp[1], 1, &imm[0], 1);
> + ureg_insn(t->ureg, TGSI_OPCODE_RCP, &tmp[1], 1, &imm[0], 1, 0);
>
> imm[0] = ureg_src(tmp[0]);
> imm[1] = ureg_src(tmp[1]);
> - ureg_insn(t->ureg, TGSI_OPCODE_MUL, &tmp[0], 1, imm, 2);
> + ureg_insn(t->ureg, TGSI_OPCODE_MUL, &tmp[0], 1, imm, 2, 0);
>
> return ureg_src(tmp[0]);
> }
> @@ -170,35 +170,35 @@ prepare_argument(struct st_translate *t, const unsigned argId,
> src = ureg_scalar(src, TGSI_SWIZZLE_W);
> break;
> }
> - ureg_insn(t->ureg, TGSI_OPCODE_MOV, &arg, 1, &src, 1);
> + ureg_insn(t->ureg, TGSI_OPCODE_MOV, &arg, 1, &src, 1, 0);
>
> if (srcReg->argMod & GL_COMP_BIT_ATI) {
> struct ureg_src modsrc[2];
> modsrc[0] = ureg_imm1f(t->ureg, 1.0f);
> modsrc[1] = ureg_negate(ureg_src(arg));
>
> - ureg_insn(t->ureg, TGSI_OPCODE_ADD, &arg, 1, modsrc, 2);
> + ureg_insn(t->ureg, TGSI_OPCODE_ADD, &arg, 1, modsrc, 2, 0);
> }
> if (srcReg->argMod & GL_BIAS_BIT_ATI) {
> struct ureg_src modsrc[2];
> modsrc[0] = ureg_src(arg);
> modsrc[1] = ureg_imm1f(t->ureg, -0.5f);
>
> - ureg_insn(t->ureg, TGSI_OPCODE_ADD, &arg, 1, modsrc, 2);
> + ureg_insn(t->ureg, TGSI_OPCODE_ADD, &arg, 1, modsrc, 2, 0);
> }
> if (srcReg->argMod & GL_2X_BIT_ATI) {
> struct ureg_src modsrc[2];
> modsrc[0] = ureg_src(arg);
> modsrc[1] = ureg_src(arg);
>
> - ureg_insn(t->ureg, TGSI_OPCODE_ADD, &arg, 1, modsrc, 2);
> + ureg_insn(t->ureg, TGSI_OPCODE_ADD, &arg, 1, modsrc, 2, 0);
> }
> if (srcReg->argMod & GL_NEGATE_BIT_ATI) {
> struct ureg_src modsrc[2];
> modsrc[0] = ureg_src(arg);
> modsrc[1] = ureg_imm1f(t->ureg, -1.0f);
>
> - ureg_insn(t->ureg, TGSI_OPCODE_MUL, &arg, 1, modsrc, 2);
> + ureg_insn(t->ureg, TGSI_OPCODE_MUL, &arg, 1, modsrc, 2, 0);
> }
> return ureg_src(arg);
> }
> @@ -217,25 +217,25 @@ emit_special_inst(struct st_translate *t, const struct instruction_desc *desc,
> tmp[0] = get_temp(t, MAX_NUM_FRAGMENT_REGISTERS_ATI + 2); /* re-purpose a3 */
> src[0] = ureg_imm1f(t->ureg, 0.5f);
> src[1] = ureg_negate(args[2]);
> - ureg_insn(t->ureg, TGSI_OPCODE_ADD, tmp, 1, src, 2);
> + ureg_insn(t->ureg, TGSI_OPCODE_ADD, tmp, 1, src, 2, 0);
> src[0] = ureg_src(tmp[0]);
> src[1] = args[0];
> src[2] = args[1];
> - ureg_insn(t->ureg, TGSI_OPCODE_CMP, dst, 1, src, 3);
> + ureg_insn(t->ureg, TGSI_OPCODE_CMP, dst, 1, src, 3, 0);
> } else if (!strcmp(desc->name, "CND0")) {
> src[0] = args[2];
> src[1] = args[1];
> src[2] = args[0];
> - ureg_insn(t->ureg, TGSI_OPCODE_CMP, dst, 1, src, 3);
> + ureg_insn(t->ureg, TGSI_OPCODE_CMP, dst, 1, src, 3, 0);
> } else if (!strcmp(desc->name, "DOT2_ADD")) {
> /* note: DP2A is not implemented in most pipe drivers */
> tmp[0] = get_temp(t, MAX_NUM_FRAGMENT_REGISTERS_ATI); /* re-purpose a1 */
> src[0] = args[0];
> src[1] = args[1];
> - ureg_insn(t->ureg, TGSI_OPCODE_DP2, tmp, 1, src, 2);
> + ureg_insn(t->ureg, TGSI_OPCODE_DP2, tmp, 1, src, 2, 0);
> src[0] = ureg_src(tmp[0]);
> src[1] = ureg_scalar(args[2], TGSI_SWIZZLE_Z);
> - ureg_insn(t->ureg, TGSI_OPCODE_ADD, dst, 1, src, 2);
> + ureg_insn(t->ureg, TGSI_OPCODE_ADD, dst, 1, src, 2, 0);
> }
> }
>
> @@ -249,7 +249,7 @@ emit_arith_inst(struct st_translate *t,
> return;
> }
>
> - ureg_insn(t->ureg, desc->TGSI_opcode, dst, 1, args, argcount);
> + ureg_insn(t->ureg, desc->TGSI_opcode, dst, 1, args, argcount, 0);
> }
>
> static void
> @@ -292,7 +292,7 @@ emit_dstmod(struct st_translate *t,
> if (dstMod & GL_SATURATE_BIT_ATI) {
> dst = ureg_saturate(dst);
> }
> - ureg_insn(t->ureg, TGSI_OPCODE_MUL, &dst, 1, src, 2);
> + ureg_insn(t->ureg, TGSI_OPCODE_MUL, &dst, 1, src, 2, 0);
> }
>
> /**
> @@ -334,9 +334,9 @@ compile_setupinst(struct st_translate *t,
> src[1] = t->samplers[r];
> /* the texture target is still unknown, it will be fixed in the draw call */
> ureg_tex_insn(t->ureg, TGSI_OPCODE_TEX, dst, 1, TGSI_TEXTURE_2D,
> - TGSI_RETURN_TYPE_FLOAT, NULL, 0, src, 2);
> + TGSI_RETURN_TYPE_FLOAT, NULL, 0, src, 2, 0);
> } else if (texinst->Opcode == ATI_FRAGMENT_SHADER_PASS_OP) {
> - ureg_insn(t->ureg, TGSI_OPCODE_MOV, dst, 1, src, 1);
> + ureg_insn(t->ureg, TGSI_OPCODE_MOV, dst, 1, src, 1, 0);
> }
>
> t->regs_written[t->current_pass][r] = true;
> @@ -408,11 +408,11 @@ finalize_shader(struct st_translate *t, unsigned numPasses)
> /* copy the result into the OUT slot */
> dst[0] = t->outputs[t->outputMapping[FRAG_RESULT_COLOR]];
> src[0] = ureg_src(t->temps[0]);
> - ureg_insn(t->ureg, TGSI_OPCODE_MOV, dst, 1, src, 1);
> + ureg_insn(t->ureg, TGSI_OPCODE_MOV, dst, 1, src, 1, 0);
> }
>
> /* signal the end of the program */
> - ureg_insn(t->ureg, TGSI_OPCODE_END, dst, 0, src, 0);
> + ureg_insn(t->ureg, TGSI_OPCODE_END, dst, 0, src, 0, 0);
> }
>
> /**
> diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
> index 19f90f21fe..ecd9f9f280 100644
> --- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
> +++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
> @@ -5900,7 +5900,7 @@ compile_tgsi_instruction(struct st_translate *t,
> case TGSI_OPCODE_IF:
> case TGSI_OPCODE_UIF:
> assert(num_dst == 0);
> - ureg_insn(ureg, inst->op, NULL, 0, src, num_src);
> + ureg_insn(ureg, inst->op, NULL, 0, src, num_src, inst->precise);
> return;
>
> case TGSI_OPCODE_TEX:
> @@ -5935,7 +5935,7 @@ compile_tgsi_instruction(struct st_translate *t,
> tex_target,
> st_translate_texture_type(inst->tex_type),
> texoffsets, inst->tex_offset_num_offset,
> - src, num_src);
> + src, num_src, inst->precise);
> return;
>
> case TGSI_OPCODE_RESQ:
> @@ -5966,7 +5966,7 @@ compile_tgsi_instruction(struct st_translate *t,
> assert(src[0].File != TGSI_FILE_NULL);
> ureg_memory_insn(ureg, inst->op, dst, num_dst, src, num_src,
> inst->buffer_access,
> - tex_target, inst->image_format);
> + tex_target, inst->image_format, inst->precise);
> break;
>
> case TGSI_OPCODE_STORE:
> @@ -5984,19 +5984,19 @@ compile_tgsi_instruction(struct st_translate *t,
> assert(dst[0].File != TGSI_FILE_NULL);
> ureg_memory_insn(ureg, inst->op, dst, num_dst, src, num_src,
> inst->buffer_access,
> - tex_target, inst->image_format);
> + tex_target, inst->image_format, inst->precise);
> break;
>
> case TGSI_OPCODE_SCS:
> dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY);
> - ureg_insn(ureg, inst->op, dst, num_dst, src, num_src);
> + ureg_insn(ureg, inst->op, dst, num_dst, src, num_src, inst->precise);
> break;
>
> default:
> ureg_insn(ureg,
> inst->op,
> dst, num_dst,
> - src, num_src);
> + src, num_src, inst->precise);
> break;
> }
> }
> diff --git a/src/mesa/state_tracker/st_mesa_to_tgsi.c b/src/mesa/state_tracker/st_mesa_to_tgsi.c
> index 984ff92130..f11013c116 100644
> --- a/src/mesa/state_tracker/st_mesa_to_tgsi.c
> +++ b/src/mesa/state_tracker/st_mesa_to_tgsi.c
> @@ -558,7 +558,7 @@ compile_instruction(
> inst->TexShadow ),
> TGSI_RETURN_TYPE_FLOAT,
> NULL, 0,
> - src, num_src );
> + src, num_src, 0 );
> return;
>
> case OPCODE_SCS:
> @@ -566,7 +566,7 @@ compile_instruction(
> ureg_insn( ureg,
> translate_opcode( inst->Opcode ),
> dst, num_dst,
> - src, num_src );
> + src, num_src, 0 );
> break;
>
> case OPCODE_XPD:
> @@ -574,7 +574,7 @@ compile_instruction(
> ureg_insn( ureg,
> translate_opcode( inst->Opcode ),
> dst, num_dst,
> - src, num_src );
> + src, num_src, 0 );
> break;
>
> case OPCODE_RSQ:
> @@ -593,7 +593,7 @@ compile_instruction(
> ureg_insn( ureg,
> translate_opcode( inst->Opcode ),
> dst, num_dst,
> - src, num_src );
> + src, num_src, 0);
> break;
> }
> }
> diff --git a/src/mesa/state_tracker/st_pbo.c b/src/mesa/state_tracker/st_pbo.c
> index 303c8535b2..3dff1609e8 100644
> --- a/src/mesa/state_tracker/st_pbo.c
> +++ b/src/mesa/state_tracker/st_pbo.c
> @@ -528,7 +528,7 @@ create_fs(struct st_context *st, bool download, enum pipe_texture_target target,
> op[0] = ureg_src(temp0);
> op[1] = ureg_src(temp1);
> ureg_memory_insn(ureg, TGSI_OPCODE_STORE, &out, 1, op, 2, 0,
> - TGSI_TEXTURE_BUFFER, PIPE_FORMAT_NONE);
> + TGSI_TEXTURE_BUFFER, PIPE_FORMAT_NONE, 0);
>
> ureg_release_temporary(ureg, temp1);
> } else {
>
--
Lerne, wie die Welt wirklich ist,
Aber vergiss niemals, wie sie sein sollte.
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