[Mesa-dev] [PATCH 06/15] i965/miptree: Prepare mapping for isl based

Topi Pohjolainen topi.pohjolainen at gmail.com
Tue Jun 13 19:10:57 UTC 2017


Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 35 ++++++++++++++++++---------
 1 file changed, 24 insertions(+), 11 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 9c15c1071e..4472f822ea 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -2846,8 +2846,14 @@ intel_miptree_map_gtt(struct brw_context *brw,
       x += image_x;
       y += image_y;
 
-      map->stride = mt->pitch;
-      map->ptr = base + y * map->stride + x * mt->cpp;
+      if (mt->surf.size) {
+         const unsigned cpp = isl_format_get_layout(mt->surf.format)->bpb / 8;
+         map->stride = mt->surf.row_pitch;
+         map->ptr = base + y * map->stride + x * cpp;
+      } else {
+         map->stride = mt->pitch;
+         map->ptr = base + y * map->stride + x * mt->cpp;
+      }
    }
 
    DBG("%s: %d,%d %dx%d from mt %p (%s) "
@@ -3349,10 +3355,13 @@ intel_miptree_release_map(struct intel_mipmap_tree *mt,
 }
 
 static bool
-can_blit_slice(struct intel_mipmap_tree *mt,
-               unsigned int level, unsigned int slice)
+can_blit_slice(const struct intel_mipmap_tree *mt,
+               unsigned level, unsigned slice)
 {
    /* See intel_miptree_blit() for details on the 32k pitch limit. */
+   if (mt->surf.size > 0 && mt->surf.row_pitch >= 32768)
+      return false;
+
    if (mt->pitch >= 32768)
       return false;
 
@@ -3360,27 +3369,31 @@ can_blit_slice(struct intel_mipmap_tree *mt,
 }
 
 static bool
-use_intel_mipree_map_blit(struct brw_context *brw,
-                          struct intel_mipmap_tree *mt,
+use_intel_mipree_map_blit(const struct brw_context *brw,
+                          const struct intel_mipmap_tree *mt,
                           GLbitfield mode,
-                          unsigned int level,
-                          unsigned int slice)
+                          unsigned level,
+                          unsigned slice)
 {
+   const uint32_t tiling =
+      mt->surf.size > 0 ? isl_tiling_to_bufmgr_tiling(mt->surf.tiling) :
+      mt->tiling;
+
    if (brw->has_llc &&
       /* It's probably not worth swapping to the blit ring because of
        * all the overhead involved.
        */
        !(mode & GL_MAP_WRITE_BIT) &&
        !mt->compressed &&
-       (mt->tiling == I915_TILING_X ||
+       (tiling == I915_TILING_X ||
         /* Prior to Sandybridge, the blitter can't handle Y tiling */
-        (brw->gen >= 6 && mt->tiling == I915_TILING_Y) ||
+        (brw->gen >= 6 && tiling == I915_TILING_Y) ||
         /* Fast copy blit on skl+ supports all tiling formats. */
         brw->gen >= 9) &&
        can_blit_slice(mt, level, slice))
       return true;
 
-   if (mt->tiling != I915_TILING_NONE &&
+   if (tiling != I915_TILING_NONE &&
        mt->bo->size >= brw->max_gtt_map_object_size) {
       assert(can_blit_slice(mt, level, slice));
       return true;
-- 
2.11.0



More information about the mesa-dev mailing list