[Mesa-dev] [PATCH 2/3] i965/bufmgr: Add a new, simpler, bo_alloc_tiled

[Alejandro Piñeiro]

On 14/06/17 01:19, Jason Ekstrand wrote:
> ISL already has all of the complexity required to figure out the correct
> surface pitch and size taking tile alignment into account.  When we get
> a surface out of ISL, the pitch and size are already correct and using
> brw_bo_alloc_tiled_2d doesn't actually gain us anything other than extra
> asserts we have to do in order to ensure that the bufmgr code and ISL
> agree.  This new helper doesn't try to be smart but just allocates the
> BO you ask for and sets up the tiling.

Just to confirm: so in this case, it will not happen that the tiling
format will be rejected like in the renamed _2d one, right?

Additionally, from this comment I understand that there is some
conditions for calling this method. Or in other words, if you are
writing new code, how you would decide if you need the complex version
or if the simplified one is enough? Perhaps a extra little explanation
on the methods documentation?

> ---
>  src/mesa/drivers/dri/i965/brw_bufmgr.c |  8 ++++++++
>  src/mesa/drivers/dri/i965/brw_bufmgr.h | 18 ++++++++++++++++++
>  2 files changed, 26 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_bufmgr.c b/src/mesa/drivers/dri/i965/brw_bufmgr.c
> index 26f1423..42cc0c2 100644
> --- a/src/mesa/drivers/dri/i965/brw_bufmgr.c
> +++ b/src/mesa/drivers/dri/i965/brw_bufmgr.c
> @@ -374,6 +374,14 @@ brw_bo_alloc(struct brw_bufmgr *bufmgr,
>  }
>  
>  struct brw_bo *
> +brw_bo_alloc_tiled(struct brw_bufmgr *bufmgr, const char *name,
> +                   uint64_t size, uint32_t tiling_mode, uint32_t pitch,
> +                   unsigned flags)
> +{
> +   return bo_alloc_internal(bufmgr, name, size, flags, tiling_mode, pitch, 0);
> +}
> +
> +struct brw_bo *
>  brw_bo_alloc_tiled_2d(struct brw_bufmgr *bufmgr, const char *name,
>                        int x, int y, int cpp, uint32_t tiling,
>                        uint32_t *pitch, unsigned flags)
> diff --git a/src/mesa/drivers/dri/i965/brw_bufmgr.h b/src/mesa/drivers/dri/i965/brw_bufmgr.h
> index 1c116c2..48488bc 100644
> --- a/src/mesa/drivers/dri/i965/brw_bufmgr.h
> +++ b/src/mesa/drivers/dri/i965/brw_bufmgr.h
> @@ -152,6 +152,24 @@ struct brw_bo *brw_bo_alloc(struct brw_bufmgr *bufmgr, const char *name,
>   *  I915_TILING_NONE
>   *  I915_TILING_X
>   *  I915_TILING_Y
> + */
> +struct brw_bo *brw_bo_alloc_tiled(struct brw_bufmgr *bufmgr,
> +                                  const char *name,
> +                                  uint64_t size,
> +                                  uint32_t tiling_mode,
> +                                  uint32_t pitch,
> +                                  unsigned flags);
> +
> +/**
> + * Allocate a tiled buffer object.
> + *
> + * Alignment for tiled objects is set automatically; the 'flags'
> + * argument provides a hint about how the object will be used initially.
> + *
> + * Valid tiling formats are:
> + *  I915_TILING_NONE
> + *  I915_TILING_X
> + *  I915_TILING_Y
>   *
>   * Note the tiling format may be rejected; callers should check the
>   * 'tiling_mode' field on return, as well as the pitch value, which