[Mesa-dev] [PATCH 06/15] i965: Prepare slice validator for isl based miptrees

[Nanley Chery]

On Wed, Jun 14, 2017 at 10:36:16AM +0300, Pohjolainen, Topi wrote:
> On Tue, Jun 13, 2017 at 05:26:52PM -0700, Nanley Chery wrote:
> > On Tue, Jun 13, 2017 at 05:50:04PM +0300, Topi Pohjolainen wrote:
> > > Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
> > > ---
> > >  src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 8 +++++++-
> > >  1 file changed, 7 insertions(+), 1 deletion(-)
> > > 
> > > diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
> > > index 8479b285cb..0b85bc12ef 100644
> > > --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
> > > +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
> > > @@ -748,7 +748,13 @@ intel_miptree_check_level_layer(const struct intel_mipmap_tree *mt,
> > >  
> > >     assert(level >= mt->first_level);
> > >     assert(level <= mt->last_level);
> > > -   assert(layer < mt->level[level].depth);
> > > +
> > > +   if (mt->surf.size > 0)
> > > +      assert(layer < (mt->surf.dim == ISL_SURF_DIM_3D ?
> > > +                         mt->surf.phys_level0_sa.depth :
> > > +                         mt->surf.phys_level0_sa.array_len));
> > 
> > Did you mean to access mt->surf.logical_level0_px here?
> 
> I was just about to say that "Actually no, mt->level[level].depth represents
> the number of physical layers." 

You may be right. I just expected the other field would be accessed
because in the previous patch you access logical_level0_px instead of
phys_level0_sa. I'm not very experienced with this code so I may have
missed some detail.

> But now reading the current logic I remembered
> that Jason just recently changed all that. This is based on the way it was
> before. Thanks Nanley!
> 
> > 
> > -Nanley
> > 
> > > +   else
> > > +      assert(layer < mt->level[level].depth);
> > >  }
> > >  
> > >  void intel_miptree_reference(struct intel_mipmap_tree **dst,
> > > -- 
> > > 2.11.0
> > > 
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