[Mesa-dev] [PATCH 4/7] i965: Add an end-of-pipe sync helper

[Jason Ekstrand]

On Thu, Jun 15, 2017 at 9:14 AM, Chris Wilson <chris at chris-wilson.co.uk>
wrote:

> Quoting Jason Ekstrand (2017-06-15 16:59:19)
> > On Thu, Jun 15, 2017 at 4:11 AM, Chris Wilson <chris at chris-wilson.co.uk>
> wrote:
> >     The kernel does have a LRI after a flush before signaling the batch
> is
> >     complete. I don't see a need to add another...
> >
> >     The question is whether this posting is required for GPU visibility
> of
> >     results or just CPU? I suspect this is just for CPU in which case it
> >     doesn't belong here at all, but before flagging rendering as ready
> for
> >     async (i.e. not involving the kernel) inspection.
> >
> >
> > The docs, if you choose to believe them, seem to indicate that this is
> needed
> > for GPU visibility as well as CPU.
>
> The kernel has LRI (for semaphore updates) not LRM, is that significant?
> Took me long enough to notice the difference.
>

I don't know.  We're getting so far outside the realm of documentation here
that it's crazy.  What I do know is that the comments in the windows source
indicate that SDI is insufficient on Haswell.  My gut says it has something
to do with forcing a round-trip through the memory controller.  For
semaphore updates, LRI may be sufficient since they're register-based on
gen7.
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