[Mesa-dev] [PATCH 0/6] i965/vec4: Implement partial DF register spilling

[Samuel Iglesias Gonsálvez]

On Thu, 2017-06-15 at 13:15 +0200, Samuel Iglesias Gonsálvez wrote:
> Hello,
> 
> As mentioned in the patch series that implemented Ivybridge support
> ARB_gpu_shader_fp64 [0], the only missing feature in that series was
> register spilling of 64-bit data and, because of that, about ~39 fp64
> piglit tests failed to spill registers.
> 
> This new patch series implement register spilling of 64-bit data for
> IVB and splitted DF instructions on vec4 backend in general.

I have realized that the latter was not being done due to an error on
my side: I limited it to IVB in some places. I have changed the
corresponding conditions on my local branch, ready to send for a v2.
However I prefer to have some feedback of the branch before doing so.

Sam

> Unfortunately, this doesn't make the previous failed tests to pass :-
> (
> 
> Nevertheless, I think this is still useful to have it in place. The
> implementation uses 1-OWord block write/read messages by reusing the
> existing implementation. Thanks to that, we can write/read valid
> dvecN
> data to/from scratch memory even under non-uniform control flow.
> 
> If you want to test the branch:
> 
> $ git clone -b fp64-ivb-vec4-spilling \
> https://github.com/Igalia/mesa.git
> 
> Thanks,
> 
> Sam
> 
> [0] https://lists.freedesktop.org/archives/mesa-dev/2017-March/148646
> .html
> 
> Samuel Iglesias Gonsálvez (6):
>   i965/eu: add support for 1-OWord Block Read/Write messages
>   i965/vec4/generator: use 1-Oword Block Read/Write messages for DF
>     scratch writes/reads
>   i965/generator: use MRF when sending 1-OWord read messages for DF
>     scratch reads on IVB
>   i965/vec4: add support for doing DF register spilling on IVB
>   i965/vec4: fix resolve reladdr case on DF scratch read/write on IVB
>   i965/vec4: allow partial DF register spilling
> 
>  src/intel/compiler/brw_eu.h                  |  18 ++--
>  src/intel/compiler/brw_eu_defines.h          |   2 +
>  src/intel/compiler/brw_eu_emit.c             |  42 +++++++--
>  src/intel/compiler/brw_fs_generator.cpp      |   5 +-
>  src/intel/compiler/brw_shader.cpp            |   5 +
>  src/intel/compiler/brw_vec4.cpp              |  10 ++
>  src/intel/compiler/brw_vec4.h                |  17 +++-
>  src/intel/compiler/brw_vec4_generator.cpp    | 136
> +++++++++++++++++++++++++++
>  src/intel/compiler/brw_vec4_reg_allocate.cpp |  42 +++++++--
>  src/intel/compiler/brw_vec4_visitor.cpp      | 125
> ++++++++++++++++++++++--
>  10 files changed, 361 insertions(+), 41 deletions(-)
> 
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