[Mesa-dev] [PATCH 11/15] i965: Add isl based miptree creator

Nanley Chery nanleychery at gmail.com
Fri Jun 16 18:11:31 UTC 2017


On Tue, Jun 13, 2017 at 05:50:09PM +0300, Topi Pohjolainen wrote:
> Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
> ---
>  src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 76 +++++++++++++++++++++++++++
>  1 file changed, 76 insertions(+)
> 
> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> index 212dfa30ec..0854b4eb5d 100644
> --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> @@ -643,6 +643,82 @@ free_aux_state_map(enum isl_aux_state **state)
>  }
>  
>  static struct intel_mipmap_tree *
> +make_surface(struct brw_context *brw, GLenum target, mesa_format format,
> +             unsigned first_level, unsigned last_level,
> +             unsigned width0, unsigned height0, unsigned depth0,
> +             unsigned num_samples, enum isl_tiling isl_tiling,
> +             isl_surf_usage_flags_t isl_usage_flags, uint32_t alloc_flags,
> +             struct brw_bo *bo)
		^
		const ?

> +{
> +   struct intel_mipmap_tree *mt = calloc(sizeof(*mt), 1);
> +   if (!mt)
> +      return NULL;
> +
> +   if (!create_mapping_table(target, first_level, last_level, depth0,
> +                             mt->level)) {
> +      free(mt);
> +      return NULL;
> +   }
> +
> +   if (target == GL_TEXTURE_CUBE_MAP ||
> +       target == GL_TEXTURE_CUBE_MAP_ARRAY)
> +      isl_usage_flags |= ISL_SURF_USAGE_CUBE_BIT;
> +
> +   DBG("%s: %s %s %ux %u:%u:%u %d..%d <-- %p\n",
> +        __func__,
> +       _mesa_enum_to_string(target),
> +       _mesa_get_format_name(format),
> +       num_samples, width0, height0, depth0,
> +       first_level, last_level, mt);
> +
> +   struct isl_surf_init_info init_info = {
> +      .dim = get_isl_surf_dim(target),
> +      .format = translate_tex_format(brw, format, false),
> +      .width = width0,
> +      .height = height0,
> +      .depth = target == GL_TEXTURE_3D ? depth0 : 1,
> +      .levels = last_level - first_level + 1,
> +      .array_len = target == GL_TEXTURE_3D ? 1 : depth0,
> +      .samples = MAX2(num_samples, 1),
> +      .usage = isl_usage_flags, 
> +      .tiling_flags = 1u << isl_tiling
> +   };
> +
> +   if (!isl_surf_init_s(&brw->isl_dev, &mt->surf, &init_info))
> +      goto fail;
> +
> +   assert(mt->surf.size % mt->surf.row_pitch == 0);
> +
> +   if (!bo) {
> +      unsigned pitch = mt->surf.row_pitch;
	^
	MAYBE_UNUSED for release builds?

This patch is
Reviewed-by: Nanley Chery <nanley.g.chery at intel.com>

I've taken a brief skim at the rest of the patches and it all looks
good. Given that the rest of the series has already been reviewed, I
think I'll stop here.

Cheers,
Nanley

> +      mt->bo = brw_bo_alloc_tiled(brw->bufmgr, "isl-miptree",
> +                                  mt->surf.row_pitch,
> +                                  mt->surf.size / mt->surf.row_pitch,
> +                                  1, isl_tiling_to_bufmgr_tiling(isl_tiling),
> +                                  &pitch, alloc_flags);
> +      if (!mt->bo)
> +         goto fail;
> +
> +      assert(pitch == mt->surf.row_pitch);
> +   } else {
> +      mt->bo = bo;
> +   }
> +
> +   mt->first_level = first_level;
> +   mt->last_level = last_level;
> +   mt->target = target;
> +   mt->format = format;
> +   mt->refcount = 1;
> +   mt->aux_state = NULL;
> +
> +   return mt;
> +
> +fail:
> +   intel_miptree_release(&mt);
> +   return NULL;
> +}
> +
> +static struct intel_mipmap_tree *
>  miptree_create(struct brw_context *brw,
>                 GLenum target,
>                 mesa_format format,
> -- 
> 2.11.0
> 
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