[Mesa-dev] [PATCH 1/4] radeonsi/gfx9: disable sparse buffers

Marek Olšák maraeo at gmail.com
Sat Jun 17 13:44:31 UTC 2017


From: Marek Olšák <marek.olsak at amd.com>

---
 src/gallium/drivers/radeonsi/si_pipe.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 9d9cbd4..2b39ed0 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -558,20 +558,23 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 	case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 	case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 	case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 		/* SI doesn't support unaligned loads.
 		 * CIK needs DRM 2.50.0 on radeon. */
 		return sscreen->b.chip_class == SI ||
 		       (sscreen->b.info.drm_major == 2 &&
 			sscreen->b.info.drm_minor < 50);
 
 	case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
+		/* TODO: GFX9 hangs. */
+		if (sscreen->b.chip_class >= GFX9)
+			return 0;
 		/* Disable on SI due to VM faults in CP DMA. Enable once these
 		 * faults are mitigated in software.
 		 */
 		if (sscreen->b.chip_class >= CIK &&
 		    sscreen->b.info.drm_major == 3 &&
 		    sscreen->b.info.drm_minor >= 13)
 			return RADEON_SPARSE_PAGE_SIZE;
 		return 0;
 
 	/* Unsupported features. */
-- 
2.7.4



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