[Mesa-dev] [PATCH 4/4] radeonsi: add a workaround for inexact SNORM8 blitting again

[Nicolai Hähnle]

On 19.06.2017 16:15, Marek Olšák wrote:
> On Mon, Jun 19, 2017 at 2:56 PM, Nicolai Hähnle <nhaehnle at gmail.com> wrote:
>> On 17.06.2017 15:44, Marek Olšák wrote:
>>>
>>> From: Marek Olšák <marek.olsak at amd.com>
>>>
>>> GFX9 is affected.
>>> ---
>>>    src/gallium/drivers/radeonsi/si_blit.c | 36
>>> ++++++++++++++++++++++++++++++++++
>>>    1 file changed, 36 insertions(+)
>>>
>>> diff --git a/src/gallium/drivers/radeonsi/si_blit.c
>>> b/src/gallium/drivers/radeonsi/si_blit.c
>>> index 1159594..b78fddf 100644
>>> --- a/src/gallium/drivers/radeonsi/si_blit.c
>>> +++ b/src/gallium/drivers/radeonsi/si_blit.c
>>> @@ -1133,20 +1133,56 @@ void si_resource_copy_region(struct pipe_context
>>> *ctx,
>>>                                  src_templ.format =
>>> PIPE_FORMAT_R32G32B32A32_UINT;
>>>                                  break;
>>>                          default:
>>>                                  fprintf(stderr, "Unhandled format %s with
>>> blocksize %u\n",
>>>
>>> util_format_short_name(src->format), blocksize);
>>>                                  assert(0);
>>>                          }
>>>                  }
>>>          }
>>>    +     /* SNORM8 blitting has precision issues on some chips. Use the
>>> SINT
>>> +        * equivalent instead, which doesn't force DCC decompression.
>>> +        * Note that some chips avoid this issue by using SDMA.
>>> +        */
>>> +       if (util_format_is_snorm8(dst_templ.format)) {
>>> +               switch (dst_templ.format) {
>>> +               case PIPE_FORMAT_R8_SNORM:
>>> +                       dst_templ.format = src_templ.format =
>>> PIPE_FORMAT_R8_SINT;
>>> +                       break;
>>> +               case PIPE_FORMAT_R8G8_SNORM:
>>> +                       dst_templ.format = src_templ.format =
>>> PIPE_FORMAT_R8G8_SINT;
>>> +                       break;
>>> +               case PIPE_FORMAT_R8G8B8X8_SNORM:
>>> +                       dst_templ.format = src_templ.format =
>>> PIPE_FORMAT_R8G8B8X8_SINT;
>>> +                       break;
>>> +               case PIPE_FORMAT_R8G8B8A8_SNORM:
>>> +               case PIPE_FORMAT_A8B8G8R8_SNORM: /* also swizzle */
>>> +               case PIPE_FORMAT_X8B8G8R8_SNORM: /* also swizzle */
>>> +                       dst_templ.format = src_templ.format =
>>> PIPE_FORMAT_R8G8B8A8_SINT;
>>
>>
>> Why does R8G8B8X8 need a separate case but not X8B8G8R8?
> 
> There are no SINT variants for ABGR and XBGR, so we have to use RGBA.

Okay I guess, since it's anyway just resource_copy_region.


>> Do we have a test for this?
> 
> We only have tests for GL_x_SNORM where x is R8, RG8, RGB8, and RGBA8.

Could you please add a reference to the commit message? With that:

Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>


> 
> Marek
> 


-- 
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Aber vergiss niemals, wie sie sein sollte.