[Mesa-dev] [PATCH 2/4] radeonsi/gfx9: use TC L2 for fast color clear with CP DMA

Marek Olšák maraeo at gmail.com
Tue Jun 20 17:06:29 UTC 2017


From: Marek Olšák <marek.olsak at amd.com>

---
 src/gallium/drivers/radeonsi/si_cp_dma.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c b/src/gallium/drivers/radeonsi/si_cp_dma.c
index 9505d62..e737519 100644
--- a/src/gallium/drivers/radeonsi/si_cp_dma.c
+++ b/src/gallium/drivers/radeonsi/si_cp_dma.c
@@ -135,22 +135,25 @@ static unsigned get_flush_flags(struct si_context *sctx, enum r600_coherency coh
 		return SI_CONTEXT_INV_SMEM_L1 |
 		       SI_CONTEXT_INV_VMEM_L1 |
 		       (sctx->b.chip_class == SI ? SI_CONTEXT_INV_GLOBAL_L2 : 0);
 	case R600_COHERENCY_CB_META:
 		return SI_CONTEXT_FLUSH_AND_INV_CB;
 	}
 }
 
 static unsigned get_tc_l2_flag(struct si_context *sctx, enum r600_coherency coher)
 {
-	return coher == R600_COHERENCY_SHADER &&
-	       sctx->b.chip_class >= CIK ? CP_DMA_USE_L2 : 0;
+	if ((sctx->b.chip_class >= GFX9 && coher == R600_COHERENCY_CB_META) ||
+	    (sctx->b.chip_class >= CIK && coher == R600_COHERENCY_SHADER))
+		return CP_DMA_USE_L2;
+
+	return 0;
 }
 
 static void si_cp_dma_prepare(struct si_context *sctx, struct pipe_resource *dst,
 			      struct pipe_resource *src, unsigned byte_count,
 			      uint64_t remaining_size, unsigned user_flags,
 			      bool *is_first, unsigned *packet_flags)
 {
 	/* Fast exit for a CPDMA prefetch. */
 	if ((user_flags & SI_CPDMA_SKIP_ALL) == SI_CPDMA_SKIP_ALL) {
 		*is_first = false;
-- 
2.7.4



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