[Mesa-dev] [PATCH 4/4] radeonsi/gfx9: enable DCC fast clear

Marek Olšák maraeo at gmail.com
Tue Jun 20 17:06:31 UTC 2017


From: Marek Olšák <marek.olsak at amd.com>

It seems to work now.
---
 src/gallium/drivers/radeon/r600_texture.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index f74bbce..d68587b 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -2715,24 +2715,20 @@ void evergreen_do_fast_color_clear(struct r600_common_context *rctx,
 			if (tex->dcc_gather_statistics &&
 			    rctx->family == CHIP_STONEY)
 				tex->num_slow_clears++;
 		}
 
 		/* Try to clear DCC first, otherwise try CMASK. */
 		if (vi_dcc_enabled(tex, 0)) {
 			uint32_t reset_value;
 			bool clear_words_needed;
 
-			/* TODO: fix DCC clear */
-			if (rctx->chip_class >= GFX9)
-				continue;
-
 			if (rctx->screen->debug_flags & DBG_NO_DCC_CLEAR)
 				continue;
 
 			if (!vi_get_fast_clear_parameters(fb->cbufs[i]->format,
 							  color, &reset_value,
 							  &clear_words_needed))
 				continue;
 
 			vi_dcc_clear_level(rctx, tex, 0, reset_value);
 
-- 
2.7.4



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