[Mesa-dev] [RFC PATCH 1/2] anv/i965/blorp: add command streamer debug messages

Lionel Landwerlin lionel.g.landwerlin at intel.com
Tue Jun 20 20:25:24 UTC 2017


When run with INTEL_DEBUG=batch-messages with this change, the driver
will insert debugging messages into the command stream by using the
MI_NOOP instructions. When the "Identification Number Register Write
Enable" field is set to 0, we can use the remaining 21bits to store
debug messages (3 * 7bits).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
---
 src/intel/blorp/blorp.h                       |  2 ++
 src/intel/blorp/blorp_blit.c                  |  4 ++++
 src/intel/blorp/blorp_clear.c                 | 24 +++++++++++++++++++++
 src/intel/common/gen_debug.c                  |  1 +
 src/intel/common/gen_debug.h                  |  2 +-
 src/intel/vulkan/anv_batch_chain.c            | 21 +++++++++++++++++++
 src/intel/vulkan/anv_blorp.c                  | 15 ++++++++++++++
 src/intel/vulkan/anv_genX.h                   |  6 +++++-
 src/intel/vulkan/anv_private.h                | 11 ++++++++++
 src/intel/vulkan/genX_cmd_buffer.c            | 24 +++++++++++++++++++++
 src/intel/vulkan/genX_state.c                 |  2 ++
 src/mesa/drivers/dri/i965/brw_blorp.c         | 24 +++++++++++++++++++++
 src/mesa/drivers/dri/i965/brw_context.h       |  6 ++++++
 src/mesa/drivers/dri/i965/genX_state_upload.c | 30 +++++++++++++++++++++++++++
 14 files changed, 170 insertions(+), 2 deletions(-)

diff --git a/src/intel/blorp/blorp.h b/src/intel/blorp/blorp.h
index 744c1b1ea0a..4531bbdde56 100644
--- a/src/intel/blorp/blorp.h
+++ b/src/intel/blorp/blorp.h
@@ -51,6 +51,8 @@ struct blorp_context {
       uint32_t vb;
    } mocs;

+   void (*emit_debug)(struct blorp_batch *batch,
+                      const char *format, ...);
    bool (*lookup_shader)(struct blorp_context *blorp,
                          const void *key, uint32_t key_size,
                          uint32_t *kernel_out, void *prog_data_out);
diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c
index d93cde2fcf4..f795477ac14 100644
--- a/src/intel/blorp/blorp_blit.c
+++ b/src/intel/blorp/blorp_blit.c
@@ -1855,6 +1855,10 @@ try_blorp_blit(struct blorp_batch *batch,
       result |= BLIT_HEIGHT_SHRINK;

    if (result == 0) {
+      batch->blorp->emit_debug(batch,
+                               "Blorp blit %ux%u->%ux%u",
+                               params->x0, params->y0,
+                               params->x1, params->y1);
       batch->blorp->exec(batch, params);
    }

diff --git a/src/intel/blorp/blorp_clear.c b/src/intel/blorp/blorp_clear.c
index efacadfebe4..884e25f306b 100644
--- a/src/intel/blorp/blorp_clear.c
+++ b/src/intel/blorp/blorp_clear.c
@@ -330,6 +330,8 @@ blorp_fast_clear(struct blorp_batch *batch,
                                start_layer, format, true);
    params.num_samples = params.dst.surf.samples;

+   batch->blorp->emit_debug(batch, "Blorp fastclear l=%i sl=%i nl=%i %ux%u->%ux%u",
+                            level, start_layer, num_layers, x0, y0, x1, y1);
    batch->blorp->exec(batch, &params);
 }

@@ -454,6 +456,10 @@ blorp_clear(struct blorp_batch *batch,
        * 512 but a maximum 3D texture size is much larger.
        */
       params.num_layers = MIN2(params.dst.view.array_len, num_layers);
+      batch->blorp->emit_debug(batch, "Blorp clear l=%i sl=%i nl=%i %ux%u->%ux%u",
+                               level, start_layer, params.num_layers,
+                               params.x0, params.y0,
+                               params.x1, params.y1);
       batch->blorp->exec(batch, &params);

       start_layer += params.num_layers;
@@ -537,6 +543,12 @@ blorp_clear_depth_stencil(struct blorp_batch *batch,
             params.num_layers = params.depth.view.array_len;
       }

+      batch->blorp->emit_debug(batch,
+                               "Blorp clear depth=%i level=%i sl=%i nl=%i "
+                               "%ux%u->%ux%u",
+                               clear_depth, level,
+                               start_layer, params.num_layers,
+                               x0, y0, x1, y1);
       batch->blorp->exec(batch, &params);

       start_layer += params.num_layers;
@@ -622,6 +634,10 @@ blorp_gen8_hiz_clear_attachments(struct blorp_batch *batch,
    params.depth.enabled = clear_depth;
    params.stencil.enabled = clear_stencil;
    params.stencil_ref = stencil_value;
+   batch->blorp->emit_debug(batch,
+                            "Blorp hiz clear attachment depth=%i stencil=%i "
+                            "%ux%u->%ux%u",
+                            clear_depth, clear_stencil, x0, y0, x1, y1);
    batch->blorp->exec(batch, &params);
 }

@@ -695,6 +711,12 @@ blorp_clear_attachments(struct blorp_batch *batch,

    params.vs_inputs.base_layer = start_layer;

+   batch->blorp->emit_debug(batch,
+                            "Blorp clear attachment color=%i depth=%i "
+                            "sl=%i nl=%i %ux%u->%ux%u",
+                            clear_color, clear_depth,
+                            start_layer, params.num_layers,
+                            x0, y0, x1, y1);
    batch->blorp->exec(batch, &params);
 }

@@ -762,5 +784,7 @@ blorp_ccs_resolve(struct blorp_batch *batch,
    if (!blorp_params_get_clear_kernel(batch->blorp, &params, true))
       return;

+   batch->blorp->emit_debug(batch, "Blorp CCS clear %ux%u->%ux%u",
+                            params.x0, params.y0, params.x1, params.y1);
    batch->blorp->exec(batch, &params);
 }
diff --git a/src/intel/common/gen_debug.c b/src/intel/common/gen_debug.c
index b604d56ef86..ed16a8662bb 100644
--- a/src/intel/common/gen_debug.c
+++ b/src/intel/common/gen_debug.c
@@ -57,6 +57,7 @@ static const struct debug_control debug_control[] = {
    { "vert",        DEBUG_VERTS },
    { "dri",         DEBUG_DRI },
    { "sf",          DEBUG_SF },
+   { "batch-messages", DEBUG_BATCH_MESSAGES },
    { "wm",          DEBUG_WM },
    { "urb",         DEBUG_URB },
    { "vs",          DEBUG_VS },
diff --git a/src/intel/common/gen_debug.h b/src/intel/common/gen_debug.h
index d290303682e..de0af0a45a2 100644
--- a/src/intel/common/gen_debug.h
+++ b/src/intel/common/gen_debug.h
@@ -57,7 +57,7 @@ extern uint64_t INTEL_DEBUG;
 #define DEBUG_VERTS               (1ull << 13)
 #define DEBUG_DRI                 (1ull << 14)
 #define DEBUG_SF                  (1ull << 15)
-/* Hole - feel free to reuse      (1ull << 16) */
+#define DEBUG_BATCH_MESSAGES      (1ull << 16)
 #define DEBUG_WM                  (1ull << 17)
 #define DEBUG_URB                 (1ull << 18)
 #define DEBUG_VS                  (1ull << 19)
diff --git a/src/intel/vulkan/anv_batch_chain.c b/src/intel/vulkan/anv_batch_chain.c
index 9def174b429..05686b1f8f3 100644
--- a/src/intel/vulkan/anv_batch_chain.c
+++ b/src/intel/vulkan/anv_batch_chain.c
@@ -1446,3 +1446,24 @@ anv_cmd_buffer_execbuf(struct anv_device *device,

    return result;
 }
+
+void
+anv_cmd_buffer_emit_vdebug(struct anv_cmd_buffer *cmd_buffer,
+                          const char *format, va_list args)
+{
+   char buffer[1024];
+   int length = vsnprintf(buffer, sizeof(buffer), format, args);
+   cmd_buffer->device->cmd_buffer_emit_debug(cmd_buffer,
+                                             (uint8_t *)buffer, length);
+}
+
+void
+anv_cmd_buffer_emit_debug(struct anv_cmd_buffer *cmd_buffer,
+                          const char *format, ...)
+{
+   va_list ap;
+
+   va_start(ap, format);
+   anv_cmd_buffer_emit_vdebug(cmd_buffer, format, ap);
+   va_end(ap);
+}
diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c
index a869eebc241..b4284fa88a0 100644
--- a/src/intel/vulkan/anv_blorp.c
+++ b/src/intel/vulkan/anv_blorp.c
@@ -23,6 +23,20 @@

 #include "anv_private.h"

+static void
+emit_debug(struct blorp_batch *batch, const char *format, ...)
+{
+   if ((INTEL_DEBUG & DEBUG_BATCH_MESSAGES) == 0)
+      return;
+
+   struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
+   va_list ap;
+
+   va_start(ap, format);
+   anv_cmd_buffer_emit_vdebug(cmd_buffer, format, ap);
+   va_end(ap);
+}
+
 static bool
 lookup_blorp_shader(struct blorp_context *blorp,
                     const void *key, uint32_t key_size,
@@ -95,6 +109,7 @@ anv_device_init_blorp(struct anv_device *device)
    device->blorp.mocs.tex = device->default_mocs;
    device->blorp.mocs.rb = device->default_mocs;
    device->blorp.mocs.vb = device->default_mocs;
+   device->blorp.emit_debug = emit_debug;
    device->blorp.lookup_shader = lookup_blorp_shader;
    device->blorp.upload_shader = upload_blorp_shader;
    switch (device->info.gen) {
diff --git a/src/intel/vulkan/anv_genX.h b/src/intel/vulkan/anv_genX.h
index 67147b0e92b..afec3a8b983 100644
--- a/src/intel/vulkan/anv_genX.h
+++ b/src/intel/vulkan/anv_genX.h
@@ -28,7 +28,7 @@
 /*
  * Gen-specific function declarations.  This header must *not* be included
  * directly.  Instead, it is included multiple times by anv_private.h.
- *
+ *
  * In this header file, the usual genx() macro is available.
  */

@@ -38,6 +38,10 @@

 VkResult genX(init_device_state)(struct anv_device *device);

+void genX(cmd_buffer_emit_debug)(struct anv_cmd_buffer *cmd_buffer,
+                                 const uint8_t *data,
+                                 uint32_t length);
+
 void genX(cmd_buffer_emit_state_base_address)(struct anv_cmd_buffer *cmd_buffer);

 void genX(cmd_buffer_apply_pipe_flushes)(struct anv_cmd_buffer *cmd_buffer);
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index fe6ac3bc1bd..d8225065c5e 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -58,6 +58,7 @@ typedef uint32_t xcb_window_t;

 struct anv_buffer;
 struct anv_buffer_view;
+struct anv_cmd_buffer;
 struct anv_image_view;

 struct gen_l3_config;
@@ -782,6 +783,10 @@ struct anv_device {
     pthread_mutex_t                             mutex;
     pthread_cond_t                              queue_submit;
     bool                                        lost;
+
+    void                                      (*cmd_buffer_emit_debug) (struct anv_cmd_buffer *cmd_buffer,
+                                                                        const uint8_t *data,
+                                                                        uint32_t length);
 };

 static void inline
@@ -1720,6 +1725,12 @@ anv_cmd_buffer_alloc_blorp_binding_table(struct anv_cmd_buffer *cmd_buffer,

 void anv_cmd_buffer_dump(struct anv_cmd_buffer *cmd_buffer);

+void anv_cmd_buffer_emit_debug(struct anv_cmd_buffer *cmd_buffer,
+                               const char *format, ...);
+void anv_cmd_buffer_emit_vdebug(struct anv_cmd_buffer *cmd_buffer,
+                                const char *format, va_list args);
+
+
 enum anv_fence_state {
    /** Indicates that this is a new (or newly reset fence) */
    ANV_FENCE_STATE_RESET,
diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c
index 0216ea04a80..5bc97bd212d 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -32,6 +32,30 @@
 #include "genxml/gen_macros.h"
 #include "genxml/genX_pack.h"

+void
+genX(cmd_buffer_emit_debug)(struct anv_cmd_buffer *cmd_buffer,
+                            const uint8_t *data,
+                            uint32_t length)
+{
+   uint32_t i;
+
+   for (i = 0; i < length / 3; i++) {
+      anv_batch_emit(&cmd_buffer->batch, GENX(MI_NOOP), noop) {
+         noop.IdentificationNumber =
+            (data[i * 3] & 0x7f) << 14 |
+            (data[i * 3 + 1] & 0x7f) << 7 |
+            (data[i * 3 + 2] & 0x7f);
+      }
+   }
+
+   anv_batch_emit(&cmd_buffer->batch, GENX(MI_NOOP), noop) {
+      noop.IdentificationNumber =
+         (i * 3 < length ? ((data[i * 3] & 0x7f) << 14) : 0) |
+         ((i * 3 + 1) < length ? ((data[i * 3 + 1] & 0x7f) << 7) : 0) |
+         ((i * 3 + 2) < length ? (data[i * 3 + 2] & 0x7f) : 0);
+   }
+}
+
 static void
 emit_lrm(struct anv_batch *batch,
          uint32_t reg, struct anv_bo *bo, uint32_t offset)
diff --git a/src/intel/vulkan/genX_state.c b/src/intel/vulkan/genX_state.c
index 00c4105a825..9683c56694c 100644
--- a/src/intel/vulkan/genX_state.c
+++ b/src/intel/vulkan/genX_state.c
@@ -97,6 +97,8 @@ genX(init_device_state)(struct anv_device *device)

    assert(batch.next <= batch.end);

+   device->cmd_buffer_emit_debug = genX(cmd_buffer_emit_debug);
+
    return anv_device_submit_simple_batch(device, &batch);
 }

diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c
index a01ef1ec7d4..1b68ce9c2d6 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -38,6 +38,29 @@

 #define FILE_DEBUG_FLAG DEBUG_BLORP

+static void
+brw_blorp_emit_debug(struct blorp_batch *batch,
+                     const char *format,
+                     ...)
+{
+   struct brw_context *brw = batch->blorp->driver_ctx;
+
+   if ((INTEL_DEBUG & DEBUG_BATCH_MESSAGES) == 0 &&
+       brw->vtbl.emit_debug != NULL)
+      return;
+
+   va_list args;
+
+   va_start(args, format);
+
+   char buffer[1024];
+   int length = vsnprintf(buffer, sizeof(buffer), format, args);
+
+   brw->vtbl.emit_debug(brw, (uint8_t *)buffer, length);
+
+   va_end(args);
+}
+
 static bool
 brw_blorp_lookup_shader(struct blorp_context *blorp,
                         const void *key, uint32_t key_size,
@@ -119,6 +142,7 @@ brw_blorp_init(struct brw_context *brw)
       unreachable("Invalid gen");
    }

+   brw->blorp.emit_debug = brw_blorp_emit_debug;
    brw->blorp.lookup_shader = brw_blorp_lookup_shader;
    brw->blorp.upload_shader = brw_blorp_upload_shader;
 }
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index f4b5b8335fe..10313e49041 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -657,6 +657,12 @@ struct brw_context
                                         struct brw_bo *bo,
                                         uint32_t offset_in_bytes,
                                         uint32_t report_id);
+
+      /**
+       * Emits a debug message into the command stream (gen6+ only).
+       */
+      void (*emit_debug)(struct brw_context *brw,
+                         const uint8_t *data, uint32_t length);
    } vtbl;

    struct brw_bufmgr *bufmgr;
diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c
index 064880b8209..653f569dfe7 100644
--- a/src/mesa/drivers/dri/i965/genX_state_upload.c
+++ b/src/mesa/drivers/dri/i965/genX_state_upload.c
@@ -4217,6 +4217,32 @@ genX(emit_mi_report_perf_count)(struct brw_context *brw,

 /* ---------------------------------------------------------------------- */

+#if GEN_GEN >= 6 /* MI_NOOP only available from gen6 */
+static void
+genX(emit_debug)(struct brw_context *brw, const uint8_t *data, uint32_t length)
+{
+   uint32_t i;
+
+   for (i = 0; i < length / 3; i++) {
+      brw_batch_emit(brw, GENX(MI_NOOP), noop) {
+         noop.IdentificationNumber =
+            (data[i * 3] & 0x7f) << 14 |
+            (data[i * 3 + 1] & 0x7f) << 7 |
+            (data[i * 3 + 2] & 0x7f);
+      }
+   }
+
+   brw_batch_emit(brw, GENX(MI_NOOP), noop) {
+      noop.IdentificationNumber =
+         (i * 3 < length ? ((data[i * 3] & 0x7f) << 14) : 0) |
+         ((i * 3 + 1) < length ? ((data[i * 3 + 1] & 0x7f) << 7) : 0) |
+         ((i * 3 + 2) < length ? (data[i * 3 + 2] & 0x7f) : 0);
+   }
+}
+#endif
+
+/* ---------------------------------------------------------------------- */
+
 void
 genX(init_atoms)(struct brw_context *brw)
 {
@@ -4555,4 +4581,8 @@ genX(init_atoms)(struct brw_context *brw)

    brw->vtbl.emit_mi_report_perf_count = genX(emit_mi_report_perf_count);
 #endif
+
+#if GEN_GEN >= 6
+   brw->vtbl.emit_debug = genX(emit_debug);
+#endif
 }
--
2.11.0


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