[Mesa-dev] [PATCH 1/2] intel: common: break has_hiz_and_separate_stencil into 2 flags

[Lionel Landwerlin]

i965's brw_context needs to disable hiz under some debug flag, so
break this in 2 so we can configure this at runtime.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
---
 src/intel/common/gen_device_info.c       | 12 ++++++++----
 src/intel/common/gen_device_info.h       |  3 ++-
 src/intel/isl/isl.c                      |  4 ++--
 src/mesa/drivers/dri/i965/brw_context.c  |  4 ++--
 src/mesa/drivers/dri/i965/intel_screen.c |  2 +-
 5 files changed, 15 insertions(+), 10 deletions(-)

diff --git a/src/intel/common/gen_device_info.c b/src/intel/common/gen_device_info.c
index 423748ea08c..0fbe5bbadd7 100644
--- a/src/intel/common/gen_device_info.c
+++ b/src/intel/common/gen_device_info.c
@@ -76,7 +76,8 @@ static const struct gen_device_info gen_device_info_ilk = {
 static const struct gen_device_info gen_device_info_snb_gt1 = {
    .gen = 6,
    .gt = 1,
-   .has_hiz_and_separate_stencil = true,
+   .has_hiz = true,
+   .has_separate_stencil = true,
    .has_llc = true,
    .has_pln = true,
    .has_surface_tile_offset = true,
@@ -102,7 +103,8 @@ static const struct gen_device_info gen_device_info_snb_gt1 = {
 static const struct gen_device_info gen_device_info_snb_gt2 = {
    .gen = 6,
    .gt = 2,
-   .has_hiz_and_separate_stencil = true,
+   .has_hiz = true,
+   .has_separate_stencil = true,
    .has_llc = true,
    .has_pln = true,
    .has_surface_tile_offset = true,
@@ -127,7 +129,8 @@ static const struct gen_device_info gen_device_info_snb_gt2 = {
 
 #define GEN7_FEATURES                               \
    .gen = 7,                                        \
-   .has_hiz_and_separate_stencil = true,            \
+   .has_hiz = true,                                 \
+   .has_separate_stencil = true,                    \
    .must_use_separate_stencil = true,               \
    .has_llc = true,                                 \
    .has_pln = true,                                 \
@@ -300,7 +303,8 @@ static const struct gen_device_info gen_device_info_hsw_gt3 = {
 
 #define GEN8_FEATURES                               \
    .gen = 8,                                        \
-   .has_hiz_and_separate_stencil = true,            \
+   .has_hiz = true,                                 \
+   .has_separate_stencil = true,                    \
    .has_resource_streamer = true,                   \
    .must_use_separate_stencil = true,               \
    .has_llc = true,                                 \
diff --git a/src/intel/common/gen_device_info.h b/src/intel/common/gen_device_info.h
index cc83857b759..23977455a3a 100644
--- a/src/intel/common/gen_device_info.h
+++ b/src/intel/common/gen_device_info.h
@@ -48,7 +48,8 @@ struct gen_device_info
    bool is_geminilake;
    bool is_cannonlake;
 
-   bool has_hiz_and_separate_stencil;
+   bool has_hiz;
+   bool has_separate_stencil;
    bool must_use_separate_stencil;
 
    bool has_llc;
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index 2449ffb29ae..b37d410b61b 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -66,7 +66,7 @@ isl_device_init(struct isl_device *dev,
 
    /* Did we break hiz or stencil? */
    if (ISL_DEV_USE_SEPARATE_STENCIL(dev))
-      assert(info->has_hiz_and_separate_stencil);
+      assert(info->has_hiz && info->has_separate_stencil);
    if (info->must_use_separate_stencil)
       assert(ISL_DEV_USE_SEPARATE_STENCIL(dev));
 
@@ -1847,7 +1847,7 @@ isl_emit_depth_stencil_hiz_s(const struct isl_device *dev, void *batch,
                              const struct isl_depth_stencil_hiz_emit_info *restrict info)
 {
    if (info->depth_surf && info->stencil_surf) {
-      if (!dev->info->has_hiz_and_separate_stencil) {
+      if (!(dev->info->has_hiz && dev->info->has_separate_stencil)) {
          assert(info->depth_surf == info->stencil_surf);
          assert(info->depth_address == info->stencil_address);
       }
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index 05b0d8d04ec..6e9ba1f5870 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -947,8 +947,8 @@ brwCreateContext(gl_api api,
    brw->is_cherryview = devinfo->is_cherryview;
    brw->is_broxton = devinfo->is_broxton || devinfo->is_geminilake;
    brw->has_llc = devinfo->has_llc;
-   brw->has_hiz = devinfo->has_hiz_and_separate_stencil;
-   brw->has_separate_stencil = devinfo->has_hiz_and_separate_stencil;
+   brw->has_hiz = devinfo->has_hiz;
+   brw->has_separate_stencil = devinfo->has_separate_stencil;
    brw->has_pln = devinfo->has_pln;
    brw->has_compr4 = devinfo->has_compr4;
    brw->has_surface_tile_offset = devinfo->has_surface_tile_offset;
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c
index 83b8a24509a..0ab352d7c6f 100644
--- a/src/mesa/drivers/dri/i965/intel_screen.c
+++ b/src/mesa/drivers/dri/i965/intel_screen.c
@@ -1383,7 +1383,7 @@ intelCreateBuffer(__DRIscreen *dri_screen,
    if (mesaVis->depthBits == 24) {
       assert(mesaVis->stencilBits == 8);
 
-      if (screen->devinfo.has_hiz_and_separate_stencil) {
+      if (screen->devinfo.has_hiz && screen->devinfo.has_separate_stencil) {
          rb = intel_create_private_renderbuffer(MESA_FORMAT_Z24_UNORM_X8_UINT,
                                                 num_samples);
          _mesa_attach_and_own_rb(fb, BUFFER_DEPTH, &rb->Base.Base);
-- 
2.11.0