[Mesa-dev] [PATCH] i965/cnl: Remove few optimizations listed in Cache Mode Register 1
Anuj Phogat
anuj.phogat at gmail.com
Wed Jun 21 16:52:20 UTC 2017
Float Blend Optimization Enable: This bit have been removed in gen10+
Partial Resolve Disable in VC: Recomendation is to always set this field
to 0 in gen10+.
Signed-off-by: Anuj Phogat <anuj.phogat at gmail.com>
---
src/mesa/drivers/dri/i965/brw_state_upload.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 9a858e6..14f7697 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -61,7 +61,7 @@ brw_upload_initial_gpu_state(struct brw_context *brw)
brw_upload_invariant_state(brw);
/* Recommended optimization for Victim Cache eviction in pixel backend. */
- if (brw->gen >= 9) {
+ if (brw->gen == 9) {
BEGIN_BATCH(3);
OUT_BATCH(MI_LOAD_REGISTER_IMM | (3 - 2));
OUT_BATCH(GEN7_CACHE_MODE_1);
--
2.9.4
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