[Mesa-dev] [PATCH v2 12/12] i965: Remove a lot of constants from brw_defines.h.
Rafael Antognolli
rafael.antognolli at intel.com
Wed Jun 21 18:13:49 UTC 2017
These were originally used to submit state changes using manual packing
of instructions, but we are now using genxml for that. So it should be
safe to just remove them.
Signed-off-by: Rafael Antognolli <rafael.antognolli at intel.com>
---
src/mesa/drivers/dri/i965/brw_defines.h | 729 +-------------------------------
1 file changed, 1 insertion(+), 728 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 312ddda..ce5381d 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -126,11 +126,6 @@
#define BRW_COVERAGE_PIXELS_2 2
#define BRW_COVERAGE_PIXELS_4 3
-#define BRW_CULLMODE_BOTH 0
-#define BRW_CULLMODE_NONE 1
-#define BRW_CULLMODE_FRONT 2
-#define BRW_CULLMODE_BACK 3
-
#define BRW_DEFAULTCOLOR_R8G8B8A8_UNORM 0
#define BRW_DEFAULTCOLOR_R32G32B32A32_FLOAT 1
@@ -140,18 +135,6 @@
#define BRW_DEPTHFORMAT_D24_UNORM_X8_UINT 3 /* GEN5 */
#define BRW_DEPTHFORMAT_D16_UNORM 5
-#define BRW_FLOATING_POINT_IEEE_754 0
-#define BRW_FLOATING_POINT_NON_IEEE_754 1
-
-#define BRW_FRONTWINDING_CW 0
-#define BRW_FRONTWINDING_CCW 1
-
-#define BRW_CUT_INDEX_ENABLE (1 << 10)
-
-#define BRW_INDEX_BYTE 0
-#define BRW_INDEX_WORD 1
-#define BRW_INDEX_DWORD 2
-
#define BRW_LOGICOPFUNCTION_CLEAR 0
#define BRW_LOGICOPFUNCTION_NOR 1
#define BRW_LOGICOPFUNCTION_AND_INVERTED 2
@@ -539,22 +522,6 @@ enum brw_wrap_mode {
# define GEN6_URB_GS_ENTRIES_SHIFT 8
# define GEN6_URB_GS_SIZE_SHIFT 0
-#define _3DSTATE_VF 0x780c /* GEN7.5+ */
-#define HSW_CUT_INDEX_ENABLE (1 << 8)
-
-#define _3DSTATE_VF_INSTANCING 0x7849 /* GEN8+ */
-# define GEN8_VF_INSTANCING_ENABLE (1 << 8)
-
-#define _3DSTATE_VF_SGVS 0x784a /* GEN8+ */
-# define GEN8_SGVS_ENABLE_INSTANCE_ID (1 << 31)
-# define GEN8_SGVS_INSTANCE_ID_COMPONENT_SHIFT 29
-# define GEN8_SGVS_INSTANCE_ID_ELEMENT_OFFSET_SHIFT 16
-# define GEN8_SGVS_ENABLE_VERTEX_ID (1 << 15)
-# define GEN8_SGVS_VERTEX_ID_COMPONENT_SHIFT 13
-# define GEN8_SGVS_VERTEX_ID_ELEMENT_OFFSET_SHIFT 0
-
-#define _3DSTATE_VF_TOPOLOGY 0x784b /* GEN8+ */
-
#define _3DSTATE_WM_CHROMAKEY 0x784c /* GEN8+ */
#define _3DSTATE_URB_VS 0x7830 /* GEN7+ */
@@ -582,376 +549,10 @@ enum brw_wrap_mode {
#define _3DSTATE_SCISSOR_STATE_POINTERS 0x780f /* GEN6+ */
-#define _3DSTATE_VS 0x7810 /* GEN6+ */
-/* DW2 */
-# define GEN6_VS_SPF_MODE (1 << 31)
-# define GEN6_VS_VECTOR_MASK_ENABLE (1 << 30)
-# define GEN6_VS_SAMPLER_COUNT_SHIFT 27
-# define GEN6_VS_BINDING_TABLE_ENTRY_COUNT_SHIFT 18
-# define GEN6_VS_FLOATING_POINT_MODE_IEEE_754 (0 << 16)
-# define GEN6_VS_FLOATING_POINT_MODE_ALT (1 << 16)
-# define HSW_VS_UAV_ACCESS_ENABLE (1 << 12)
-/* DW4 */
-# define GEN6_VS_DISPATCH_START_GRF_SHIFT 20
-# define GEN6_VS_URB_READ_LENGTH_SHIFT 11
-# define GEN6_VS_URB_ENTRY_READ_OFFSET_SHIFT 4
-/* DW5 */
-# define GEN6_VS_MAX_THREADS_SHIFT 25
-# define HSW_VS_MAX_THREADS_SHIFT 23
-# define GEN6_VS_STATISTICS_ENABLE (1 << 10)
-# define GEN6_VS_CACHE_DISABLE (1 << 1)
-# define GEN6_VS_ENABLE (1 << 0)
-/* Gen8+ DW7 */
-# define GEN8_VS_SIMD8_ENABLE (1 << 2)
-/* Gen8+ DW8 */
-# define GEN8_VS_URB_ENTRY_OUTPUT_OFFSET_SHIFT 21
-# define GEN8_VS_URB_OUTPUT_LENGTH_SHIFT 16
-# define GEN8_VS_USER_CLIP_DISTANCE_SHIFT 8
-
-#define _3DSTATE_GS 0x7811 /* GEN6+ */
-/* DW2 */
-# define GEN6_GS_SPF_MODE (1 << 31)
-# define GEN6_GS_VECTOR_MASK_ENABLE (1 << 30)
-# define GEN6_GS_SAMPLER_COUNT_SHIFT 27
-# define GEN6_GS_BINDING_TABLE_ENTRY_COUNT_SHIFT 18
-# define GEN6_GS_FLOATING_POINT_MODE_IEEE_754 (0 << 16)
-# define GEN6_GS_FLOATING_POINT_MODE_ALT (1 << 16)
-# define HSW_GS_UAV_ACCESS_ENABLE (1 << 12)
-/* DW4 */
-# define GEN7_GS_OUTPUT_VERTEX_SIZE_SHIFT 23
-# define GEN7_GS_OUTPUT_TOPOLOGY_SHIFT 17
-# define GEN6_GS_URB_READ_LENGTH_SHIFT 11
-# define GEN7_GS_INCLUDE_VERTEX_HANDLES (1 << 10)
-# define GEN6_GS_URB_ENTRY_READ_OFFSET_SHIFT 4
-# define GEN6_GS_DISPATCH_START_GRF_SHIFT 0
-/* DW5 */
-# define GEN6_GS_MAX_THREADS_SHIFT 25
-# define HSW_GS_MAX_THREADS_SHIFT 24
-# define IVB_GS_CONTROL_DATA_FORMAT_SHIFT 24
-# define GEN7_GS_CONTROL_DATA_FORMAT_GSCTL_CUT 0
-# define GEN7_GS_CONTROL_DATA_FORMAT_GSCTL_SID 1
-# define GEN7_GS_CONTROL_DATA_HEADER_SIZE_SHIFT 20
-# define GEN7_GS_INSTANCE_CONTROL_SHIFT 15
-# define GEN7_GS_DISPATCH_MODE_SHIFT 11
-# define GEN7_GS_DISPATCH_MODE_MASK INTEL_MASK(12, 11)
-# define GEN6_GS_STATISTICS_ENABLE (1 << 10)
-# define GEN6_GS_SO_STATISTICS_ENABLE (1 << 9)
-# define GEN6_GS_RENDERING_ENABLE (1 << 8)
-# define GEN7_GS_INCLUDE_PRIMITIVE_ID (1 << 4)
-# define GEN7_GS_REORDER_TRAILING (1 << 2)
-# define GEN7_GS_ENABLE (1 << 0)
-/* DW6 */
-# define HSW_GS_CONTROL_DATA_FORMAT_SHIFT 31
-# define GEN6_GS_REORDER (1 << 30)
-# define GEN6_GS_DISCARD_ADJACENCY (1 << 29)
-# define GEN6_GS_SVBI_PAYLOAD_ENABLE (1 << 28)
-# define GEN6_GS_SVBI_POSTINCREMENT_ENABLE (1 << 27)
-# define GEN6_GS_SVBI_POSTINCREMENT_VALUE_SHIFT 16
-# define GEN6_GS_SVBI_POSTINCREMENT_VALUE_MASK INTEL_MASK(25, 16)
-# define GEN6_GS_ENABLE (1 << 15)
-
-/* Gen8+ DW8 */
-# define GEN8_GS_STATIC_OUTPUT (1 << 30)
-# define GEN8_GS_STATIC_VERTEX_COUNT_SHIFT 16
-# define GEN8_GS_STATIC_VERTEX_COUNT_MASK INTEL_MASK(26, 16)
-
-/* Gen8+ DW9 */
-# define GEN8_GS_URB_ENTRY_OUTPUT_OFFSET_SHIFT 21
-# define GEN8_GS_URB_OUTPUT_LENGTH_SHIFT 16
-# define GEN8_GS_USER_CLIP_DISTANCE_SHIFT 8
-
+/* brw_ff_gs_emit.c */
# define BRW_GS_EDGE_INDICATOR_0 (1 << 8)
# define BRW_GS_EDGE_INDICATOR_1 (1 << 9)
-#define _3DSTATE_HS 0x781B /* GEN7+ */
-/* DW1 */
-# define GEN7_HS_SAMPLER_COUNT_MASK INTEL_MASK(29, 27)
-# define GEN7_HS_SAMPLER_COUNT_SHIFT 27
-# define GEN7_HS_BINDING_TABLE_ENTRY_COUNT_MASK INTEL_MASK(25, 18)
-# define GEN7_HS_BINDING_TABLE_ENTRY_COUNT_SHIFT 18
-# define GEN7_HS_FLOATING_POINT_MODE_IEEE_754 (0 << 16)
-# define GEN7_HS_FLOATING_POINT_MODE_ALT (1 << 16)
-# define GEN7_HS_MAX_THREADS_SHIFT 0
-/* DW2 */
-# define GEN7_HS_ENABLE (1 << 31)
-# define GEN7_HS_STATISTICS_ENABLE (1 << 29)
-# define GEN8_HS_MAX_THREADS_SHIFT 8
-# define GEN7_HS_INSTANCE_COUNT_MASK INTEL_MASK(3, 0)
-# define GEN7_HS_INSTANCE_COUNT_SHIFT 0
-/* DW5 */
-# define GEN7_HS_SINGLE_PROGRAM_FLOW (1 << 27)
-# define GEN7_HS_VECTOR_MASK_ENABLE (1 << 26)
-# define HSW_HS_ACCESSES_UAV (1 << 25)
-# define GEN7_HS_INCLUDE_VERTEX_HANDLES (1 << 24)
-# define GEN7_HS_DISPATCH_START_GRF_MASK INTEL_MASK(23, 19)
-# define GEN7_HS_DISPATCH_START_GRF_SHIFT 19
-# define GEN7_HS_URB_READ_LENGTH_MASK INTEL_MASK(16, 11)
-# define GEN7_HS_URB_READ_LENGTH_SHIFT 11
-# define GEN7_HS_URB_ENTRY_READ_OFFSET_MASK INTEL_MASK(9, 4)
-# define GEN7_HS_URB_ENTRY_READ_OFFSET_SHIFT 4
-
-#define _3DSTATE_TE 0x781C /* GEN7+ */
-/* DW1 */
-# define GEN7_TE_PARTITIONING_SHIFT 12
-# define GEN7_TE_OUTPUT_TOPOLOGY_SHIFT 8
-# define GEN7_TE_DOMAIN_SHIFT 4
-//# define GEN7_TE_MODE_SW (1 << 1)
-# define GEN7_TE_ENABLE (1 << 0)
-
-#define _3DSTATE_DS 0x781D /* GEN7+ */
-/* DW2 */
-# define GEN7_DS_SINGLE_DOMAIN_POINT_DISPATCH (1 << 31)
-# define GEN7_DS_VECTOR_MASK_ENABLE (1 << 30)
-# define GEN7_DS_SAMPLER_COUNT_MASK INTEL_MASK(29, 27)
-# define GEN7_DS_SAMPLER_COUNT_SHIFT 27
-# define GEN7_DS_BINDING_TABLE_ENTRY_COUNT_MASK INTEL_MASK(25, 18)
-# define GEN7_DS_BINDING_TABLE_ENTRY_COUNT_SHIFT 18
-# define GEN7_DS_FLOATING_POINT_MODE_IEEE_754 (0 << 16)
-# define GEN7_DS_FLOATING_POINT_MODE_ALT (1 << 16)
-# define HSW_DS_ACCESSES_UAV (1 << 14)
-/* DW4 */
-# define GEN7_DS_DISPATCH_START_GRF_MASK INTEL_MASK(24, 20)
-# define GEN7_DS_DISPATCH_START_GRF_SHIFT 20
-# define GEN7_DS_URB_READ_LENGTH_MASK INTEL_MASK(17, 11)
-# define GEN7_DS_URB_READ_LENGTH_SHIFT 11
-# define GEN7_DS_URB_ENTRY_READ_OFFSET_MASK INTEL_MASK(9, 4)
-# define GEN7_DS_URB_ENTRY_READ_OFFSET_SHIFT 4
-/* DW5 */
-# define GEN7_DS_MAX_THREADS_SHIFT 25
-# define HSW_DS_MAX_THREADS_SHIFT 21
-# define GEN7_DS_STATISTICS_ENABLE (1 << 10)
-# define GEN7_DS_SIMD8_DISPATCH_ENABLE (1 << 3)
-# define GEN7_DS_COMPUTE_W_COORDINATE_ENABLE (1 << 2)
-# define GEN7_DS_CACHE_DISABLE (1 << 1)
-# define GEN7_DS_ENABLE (1 << 0)
-/* Gen8+ DW8 */
-# define GEN8_DS_URB_ENTRY_OUTPUT_OFFSET_MASK INTEL_MASK(26, 21)
-# define GEN8_DS_URB_ENTRY_OUTPUT_OFFSET_SHIFT 21
-# define GEN8_DS_URB_OUTPUT_LENGTH_MASK INTEL_MASK(20, 16)
-# define GEN8_DS_URB_OUTPUT_LENGTH_SHIFT 16
-# define GEN8_DS_USER_CLIP_DISTANCE_MASK INTEL_MASK(15, 8)
-# define GEN8_DS_USER_CLIP_DISTANCE_SHIFT 8
-# define GEN8_DS_USER_CULL_DISTANCE_MASK INTEL_MASK(7, 0)
-# define GEN8_DS_USER_CULL_DISTANCE_SHIFT 0
-
-
-#define _3DSTATE_CLIP 0x7812 /* GEN6+ */
-/* DW1 */
-# define GEN7_CLIP_WINDING_CW (0 << 20)
-# define GEN7_CLIP_WINDING_CCW (1 << 20)
-# define GEN7_CLIP_VERTEX_SUBPIXEL_PRECISION_8 (0 << 19)
-# define GEN7_CLIP_VERTEX_SUBPIXEL_PRECISION_4 (1 << 19)
-# define GEN7_CLIP_EARLY_CULL (1 << 18)
-# define GEN8_CLIP_FORCE_USER_CLIP_DISTANCE_BITMASK (1 << 17)
-# define GEN7_CLIP_CULLMODE_BOTH (0 << 16)
-# define GEN7_CLIP_CULLMODE_NONE (1 << 16)
-# define GEN7_CLIP_CULLMODE_FRONT (2 << 16)
-# define GEN7_CLIP_CULLMODE_BACK (3 << 16)
-# define GEN6_CLIP_STATISTICS_ENABLE (1 << 10)
-/**
- * Just does cheap culling based on the clip distance. Bits must be
- * disjoint with USER_CLIP_CLIP_DISTANCE bits.
- */
-# define GEN6_USER_CLIP_CULL_DISTANCES_SHIFT 0
-/* DW2 */
-# define GEN6_CLIP_ENABLE (1 << 31)
-# define GEN6_CLIP_API_OGL (0 << 30)
-# define GEN6_CLIP_API_D3D (1 << 30)
-# define GEN6_CLIP_XY_TEST (1 << 28)
-# define GEN6_CLIP_Z_TEST (1 << 27)
-# define GEN6_CLIP_GB_TEST (1 << 26)
-/** 8-bit field of which user clip distances to clip aganist. */
-# define GEN6_USER_CLIP_CLIP_DISTANCES_SHIFT 16
-# define GEN6_CLIP_MODE_NORMAL (0 << 13)
-# define GEN6_CLIP_MODE_REJECT_ALL (3 << 13)
-# define GEN6_CLIP_MODE_ACCEPT_ALL (4 << 13)
-# define GEN6_CLIP_PERSPECTIVE_DIVIDE_DISABLE (1 << 9)
-# define GEN6_CLIP_NON_PERSPECTIVE_BARYCENTRIC_ENABLE (1 << 8)
-# define GEN6_CLIP_TRI_PROVOKE_SHIFT 4
-# define GEN6_CLIP_LINE_PROVOKE_SHIFT 2
-# define GEN6_CLIP_TRIFAN_PROVOKE_SHIFT 0
-/* DW3 */
-# define GEN6_CLIP_MIN_POINT_WIDTH_SHIFT 17
-# define GEN6_CLIP_MAX_POINT_WIDTH_SHIFT 6
-# define GEN6_CLIP_FORCE_ZERO_RTAINDEX (1 << 5)
-# define GEN6_CLIP_MAX_VP_INDEX_MASK INTEL_MASK(3, 0)
-
-#define _3DSTATE_SF 0x7813 /* GEN6+ */
-/* DW1 (for gen6) */
-# define GEN6_SF_NUM_OUTPUTS_SHIFT 22
-# define GEN6_SF_SWIZZLE_ENABLE (1 << 21)
-# define GEN6_SF_POINT_SPRITE_UPPERLEFT (0 << 20)
-# define GEN6_SF_POINT_SPRITE_LOWERLEFT (1 << 20)
-# define GEN9_SF_LINE_WIDTH_SHIFT 12 /* U11.7 */
-# define GEN6_SF_URB_ENTRY_READ_LENGTH_SHIFT 11
-# define GEN6_SF_URB_ENTRY_READ_OFFSET_SHIFT 4
-/* DW2 */
-# define GEN6_SF_LEGACY_GLOBAL_DEPTH_BIAS (1 << 11)
-# define GEN6_SF_STATISTICS_ENABLE (1 << 10)
-# define GEN6_SF_GLOBAL_DEPTH_OFFSET_SOLID (1 << 9)
-# define GEN6_SF_GLOBAL_DEPTH_OFFSET_WIREFRAME (1 << 8)
-# define GEN6_SF_GLOBAL_DEPTH_OFFSET_POINT (1 << 7)
-# define GEN6_SF_FRONT_SOLID (0 << 5)
-# define GEN6_SF_FRONT_WIREFRAME (1 << 5)
-# define GEN6_SF_FRONT_POINT (2 << 5)
-# define GEN6_SF_BACK_SOLID (0 << 3)
-# define GEN6_SF_BACK_WIREFRAME (1 << 3)
-# define GEN6_SF_BACK_POINT (2 << 3)
-# define GEN6_SF_VIEWPORT_TRANSFORM_ENABLE (1 << 1)
-# define GEN6_SF_WINDING_CCW (1 << 0)
-/* DW3 */
-# define GEN6_SF_LINE_AA_ENABLE (1 << 31)
-# define GEN6_SF_CULL_BOTH (0 << 29)
-# define GEN6_SF_CULL_NONE (1 << 29)
-# define GEN6_SF_CULL_FRONT (2 << 29)
-# define GEN6_SF_CULL_BACK (3 << 29)
-# define GEN6_SF_LINE_WIDTH_SHIFT 18 /* U3.7 */
-# define GEN6_SF_LINE_END_CAP_WIDTH_0_5 (0 << 16)
-# define GEN6_SF_LINE_END_CAP_WIDTH_1_0 (1 << 16)
-# define GEN6_SF_LINE_END_CAP_WIDTH_2_0 (2 << 16)
-# define GEN6_SF_LINE_END_CAP_WIDTH_4_0 (3 << 16)
-# define GEN6_SF_SCISSOR_ENABLE (1 << 11)
-# define GEN6_SF_MSRAST_OFF_PIXEL (0 << 8)
-# define GEN6_SF_MSRAST_OFF_PATTERN (1 << 8)
-# define GEN6_SF_MSRAST_ON_PIXEL (2 << 8)
-# define GEN6_SF_MSRAST_ON_PATTERN (3 << 8)
-/* DW4 */
-# define GEN6_SF_TRI_PROVOKE_SHIFT 29
-# define GEN6_SF_LINE_PROVOKE_SHIFT 27
-# define GEN6_SF_TRIFAN_PROVOKE_SHIFT 25
-# define GEN6_SF_LINE_AA_MODE_MANHATTAN (0 << 14)
-# define GEN6_SF_LINE_AA_MODE_TRUE (1 << 14)
-# define GEN6_SF_VERTEX_SUBPIXEL_8BITS (0 << 12)
-# define GEN6_SF_VERTEX_SUBPIXEL_4BITS (1 << 12)
-# define GEN6_SF_USE_STATE_POINT_WIDTH (1 << 11)
-# define GEN6_SF_POINT_WIDTH_SHIFT 0 /* U8.3 */
-/* DW5: depth offset constant */
-/* DW6: depth offset scale */
-/* DW7: depth offset clamp */
-/* DW8 */
-# define ATTRIBUTE_1_OVERRIDE_W (1 << 31)
-# define ATTRIBUTE_1_OVERRIDE_Z (1 << 30)
-# define ATTRIBUTE_1_OVERRIDE_Y (1 << 29)
-# define ATTRIBUTE_1_OVERRIDE_X (1 << 28)
-# define ATTRIBUTE_1_CONST_SOURCE_SHIFT 25
-# define ATTRIBUTE_1_SWIZZLE_SHIFT 22
-# define ATTRIBUTE_1_SOURCE_SHIFT 16
-# define ATTRIBUTE_0_OVERRIDE_W (1 << 15)
-# define ATTRIBUTE_0_OVERRIDE_Z (1 << 14)
-# define ATTRIBUTE_0_OVERRIDE_Y (1 << 13)
-# define ATTRIBUTE_0_OVERRIDE_X (1 << 12)
-# define ATTRIBUTE_0_CONST_SOURCE_SHIFT 9
-# define ATTRIBUTE_CONST_0000 0
-# define ATTRIBUTE_CONST_0001_FLOAT 1
-# define ATTRIBUTE_CONST_1111_FLOAT 2
-# define ATTRIBUTE_CONST_PRIM_ID 3
-# define ATTRIBUTE_0_SWIZZLE_SHIFT 6
-# define ATTRIBUTE_0_SOURCE_SHIFT 0
-
-# define ATTRIBUTE_SWIZZLE_INPUTATTR 0
-# define ATTRIBUTE_SWIZZLE_INPUTATTR_FACING 1
-# define ATTRIBUTE_SWIZZLE_INPUTATTR_W 2
-# define ATTRIBUTE_SWIZZLE_INPUTATTR_FACING_W 3
-# define ATTRIBUTE_SWIZZLE_SHIFT 6
-
-/* DW16: Point sprite texture coordinate enables */
-/* DW17: Constant interpolation enables */
-/* DW18: attr 0-7 wrap shortest enables */
-/* DW19: attr 8-16 wrap shortest enables */
-
-/* On GEN7, many fields of 3DSTATE_SF were split out into a new command:
- * 3DSTATE_SBE. The remaining fields live in different DWords, but retain
- * the same bit-offset. The only new field:
- */
-/* GEN7/DW1: */
-# define GEN7_SF_DEPTH_BUFFER_SURFACE_FORMAT_SHIFT 12
-/* GEN7/DW2: */
-# define HSW_SF_LINE_STIPPLE_ENABLE (1 << 14)
-
-# define GEN8_SF_SMOOTH_POINT_ENABLE (1 << 13)
-
-#define _3DSTATE_SBE 0x781F /* GEN7+ */
-/* DW1 */
-# define GEN8_SBE_FORCE_URB_ENTRY_READ_LENGTH (1 << 29)
-# define GEN8_SBE_FORCE_URB_ENTRY_READ_OFFSET (1 << 28)
-# define GEN7_SBE_SWIZZLE_CONTROL_MODE (1 << 28)
-# define GEN7_SBE_NUM_OUTPUTS_SHIFT 22
-# define GEN7_SBE_SWIZZLE_ENABLE (1 << 21)
-# define GEN7_SBE_POINT_SPRITE_LOWERLEFT (1 << 20)
-# define GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT 11
-# define GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT 4
-# define GEN8_SBE_URB_ENTRY_READ_OFFSET_SHIFT 5
-/* DW2-9: Attribute setup (same as DW8-15 of gen6 _3DSTATE_SF) */
-/* DW10: Point sprite texture coordinate enables */
-/* DW11: Constant interpolation enables */
-/* DW12: attr 0-7 wrap shortest enables */
-/* DW13: attr 8-16 wrap shortest enables */
-
-/* DW4-5: Attribute active components (gen9) */
-#define GEN9_SBE_ACTIVE_COMPONENT_NONE 0
-#define GEN9_SBE_ACTIVE_COMPONENT_XY 1
-#define GEN9_SBE_ACTIVE_COMPONENT_XYZ 2
-#define GEN9_SBE_ACTIVE_COMPONENT_XYZW 3
-
-#define _3DSTATE_SBE_SWIZ 0x7851 /* GEN8+ */
-
-#define _3DSTATE_RASTER 0x7850 /* GEN8+ */
-/* DW1 */
-# define GEN9_RASTER_VIEWPORT_Z_FAR_CLIP_TEST_ENABLE (1 << 26)
-# define GEN9_RASTER_CONSERVATIVE_RASTERIZATION_ENABLE (1 << 24)
-# define GEN8_RASTER_FRONT_WINDING_CCW (1 << 21)
-# define GEN8_RASTER_CULL_BOTH (0 << 16)
-# define GEN8_RASTER_CULL_NONE (1 << 16)
-# define GEN8_RASTER_CULL_FRONT (2 << 16)
-# define GEN8_RASTER_CULL_BACK (3 << 16)
-# define GEN8_RASTER_SMOOTH_POINT_ENABLE (1 << 13)
-# define GEN8_RASTER_API_MULTISAMPLE_ENABLE (1 << 12)
-# define GEN8_RASTER_LINE_AA_ENABLE (1 << 2)
-# define GEN8_RASTER_SCISSOR_ENABLE (1 << 1)
-# define GEN8_RASTER_VIEWPORT_Z_CLIP_TEST_ENABLE (1 << 0)
-# define GEN9_RASTER_VIEWPORT_Z_NEAR_CLIP_TEST_ENABLE (1 << 0)
-
-/* Gen8 BLEND_STATE */
-/* DW0 */
-#define GEN8_BLEND_ALPHA_TO_COVERAGE_ENABLE (1 << 31)
-#define GEN8_BLEND_INDEPENDENT_ALPHA_BLEND_ENABLE (1 << 30)
-#define GEN8_BLEND_ALPHA_TO_ONE_ENABLE (1 << 29)
-#define GEN8_BLEND_ALPHA_TO_COVERAGE_DITHER_ENABLE (1 << 28)
-#define GEN8_BLEND_ALPHA_TEST_ENABLE (1 << 27)
-#define GEN8_BLEND_ALPHA_TEST_FUNCTION_MASK INTEL_MASK(26, 24)
-#define GEN8_BLEND_ALPHA_TEST_FUNCTION_SHIFT 24
-#define GEN8_BLEND_COLOR_DITHER_ENABLE (1 << 23)
-#define GEN8_BLEND_X_DITHER_OFFSET_MASK INTEL_MASK(22, 21)
-#define GEN8_BLEND_X_DITHER_OFFSET_SHIFT 21
-#define GEN8_BLEND_Y_DITHER_OFFSET_MASK INTEL_MASK(20, 19)
-#define GEN8_BLEND_Y_DITHER_OFFSET_SHIFT 19
-/* DW1 + 2n */
-#define GEN8_BLEND_COLOR_BUFFER_BLEND_ENABLE (1 << 31)
-#define GEN8_BLEND_SRC_BLEND_FACTOR_MASK INTEL_MASK(30, 26)
-#define GEN8_BLEND_SRC_BLEND_FACTOR_SHIFT 26
-#define GEN8_BLEND_DST_BLEND_FACTOR_MASK INTEL_MASK(25, 21)
-#define GEN8_BLEND_DST_BLEND_FACTOR_SHIFT 21
-#define GEN8_BLEND_COLOR_BLEND_FUNCTION_MASK INTEL_MASK(20, 18)
-#define GEN8_BLEND_COLOR_BLEND_FUNCTION_SHIFT 18
-#define GEN8_BLEND_SRC_ALPHA_BLEND_FACTOR_MASK INTEL_MASK(17, 13)
-#define GEN8_BLEND_SRC_ALPHA_BLEND_FACTOR_SHIFT 13
-#define GEN8_BLEND_DST_ALPHA_BLEND_FACTOR_MASK INTEL_MASK(12, 8)
-#define GEN8_BLEND_DST_ALPHA_BLEND_FACTOR_SHIFT 8
-#define GEN8_BLEND_ALPHA_BLEND_FUNCTION_MASK INTEL_MASK(7, 5)
-#define GEN8_BLEND_ALPHA_BLEND_FUNCTION_SHIFT 5
-#define GEN8_BLEND_WRITE_DISABLE_ALPHA (1 << 3)
-#define GEN8_BLEND_WRITE_DISABLE_RED (1 << 2)
-#define GEN8_BLEND_WRITE_DISABLE_GREEN (1 << 1)
-#define GEN8_BLEND_WRITE_DISABLE_BLUE (1 << 0)
-/* DW1 + 2n + 1 */
-#define GEN8_BLEND_LOGIC_OP_ENABLE (1 << 31)
-#define GEN8_BLEND_LOGIC_OP_FUNCTION_MASK INTEL_MASK(30, 27)
-#define GEN8_BLEND_LOGIC_OP_FUNCTION_SHIFT 27
-#define GEN8_BLEND_PRE_BLEND_SRC_ONLY_CLAMP_ENABLE (1 << 4)
-#define GEN8_BLEND_COLOR_CLAMP_RANGE_RTFORMAT (2 << 2)
-#define GEN8_BLEND_PRE_BLEND_COLOR_CLAMP_ENABLE (1 << 1)
-#define GEN8_BLEND_POST_BLEND_COLOR_CLAMP_ENABLE (1 << 0)
-
#define _3DSTATE_WM_HZ_OP 0x7852 /* GEN8+ */
/* DW1 */
# define GEN8_WM_HZ_STENCIL_CLEAR (1 << 31)
@@ -978,275 +579,6 @@ enum brw_wrap_mode {
# define GEN8_WM_HZ_SAMPLE_MASK_MASK INTEL_MASK(15, 0)
# define GEN8_WM_HZ_SAMPLE_MASK_SHIFT 0
-
-#define _3DSTATE_PS_BLEND 0x784D /* GEN8+ */
-/* DW1 */
-# define GEN8_PS_BLEND_ALPHA_TO_COVERAGE_ENABLE (1 << 31)
-# define GEN8_PS_BLEND_HAS_WRITEABLE_RT (1 << 30)
-# define GEN8_PS_BLEND_COLOR_BUFFER_BLEND_ENABLE (1 << 29)
-# define GEN8_PS_BLEND_SRC_ALPHA_BLEND_FACTOR_MASK INTEL_MASK(28, 24)
-# define GEN8_PS_BLEND_SRC_ALPHA_BLEND_FACTOR_SHIFT 24
-# define GEN8_PS_BLEND_DST_ALPHA_BLEND_FACTOR_MASK INTEL_MASK(23, 19)
-# define GEN8_PS_BLEND_DST_ALPHA_BLEND_FACTOR_SHIFT 19
-# define GEN8_PS_BLEND_SRC_BLEND_FACTOR_MASK INTEL_MASK(18, 14)
-# define GEN8_PS_BLEND_SRC_BLEND_FACTOR_SHIFT 14
-# define GEN8_PS_BLEND_DST_BLEND_FACTOR_MASK INTEL_MASK(13, 9)
-# define GEN8_PS_BLEND_DST_BLEND_FACTOR_SHIFT 9
-# define GEN8_PS_BLEND_ALPHA_TEST_ENABLE (1 << 8)
-# define GEN8_PS_BLEND_INDEPENDENT_ALPHA_BLEND_ENABLE (1 << 7)
-
-#define _3DSTATE_WM_DEPTH_STENCIL 0x784E /* GEN8+ */
-/* DW1 */
-# define GEN8_WM_DS_STENCIL_FAIL_OP_SHIFT 29
-# define GEN8_WM_DS_Z_FAIL_OP_SHIFT 26
-# define GEN8_WM_DS_Z_PASS_OP_SHIFT 23
-# define GEN8_WM_DS_BF_STENCIL_FUNC_SHIFT 20
-# define GEN8_WM_DS_BF_STENCIL_FAIL_OP_SHIFT 17
-# define GEN8_WM_DS_BF_Z_FAIL_OP_SHIFT 14
-# define GEN8_WM_DS_BF_Z_PASS_OP_SHIFT 11
-# define GEN8_WM_DS_STENCIL_FUNC_SHIFT 8
-# define GEN8_WM_DS_DEPTH_FUNC_SHIFT 5
-# define GEN8_WM_DS_DOUBLE_SIDED_STENCIL_ENABLE (1 << 4)
-# define GEN8_WM_DS_STENCIL_TEST_ENABLE (1 << 3)
-# define GEN8_WM_DS_STENCIL_BUFFER_WRITE_ENABLE (1 << 2)
-# define GEN8_WM_DS_DEPTH_TEST_ENABLE (1 << 1)
-# define GEN8_WM_DS_DEPTH_BUFFER_WRITE_ENABLE (1 << 0)
-/* DW2 */
-# define GEN8_WM_DS_STENCIL_TEST_MASK_MASK INTEL_MASK(31, 24)
-# define GEN8_WM_DS_STENCIL_TEST_MASK_SHIFT 24
-# define GEN8_WM_DS_STENCIL_WRITE_MASK_MASK INTEL_MASK(23, 16)
-# define GEN8_WM_DS_STENCIL_WRITE_MASK_SHIFT 16
-# define GEN8_WM_DS_BF_STENCIL_TEST_MASK_MASK INTEL_MASK(15, 8)
-# define GEN8_WM_DS_BF_STENCIL_TEST_MASK_SHIFT 8
-# define GEN8_WM_DS_BF_STENCIL_WRITE_MASK_MASK INTEL_MASK(7, 0)
-# define GEN8_WM_DS_BF_STENCIL_WRITE_MASK_SHIFT 0
-/* DW3 */
-# define GEN9_WM_DS_STENCIL_REF_MASK INTEL_MASK(15, 8)
-# define GEN9_WM_DS_STENCIL_REF_SHIFT 8
-# define GEN9_WM_DS_BF_STENCIL_REF_MASK INTEL_MASK(7, 0)
-# define GEN9_WM_DS_BF_STENCIL_REF_SHIFT 0
-
-enum brw_pixel_shader_coverage_mask_mode {
- BRW_PSICMS_OFF = 0, /* PS does not use input coverage masks. */
- BRW_PSICMS_NORMAL = 1, /* Input Coverage masks based on outer conservatism
- * and factors in SAMPLE_MASK. If Pixel is
- * conservatively covered, all samples are enabled.
- */
-
- BRW_PSICMS_INNER = 2, /* Input Coverage masks based on inner conservatism
- * and factors in SAMPLE_MASK. If Pixel is
- * conservatively *FULLY* covered, all samples are
- * enabled.
- */
- BRW_PCICMS_DEPTH = 3,
-};
-
-#define _3DSTATE_PS_EXTRA 0x784F /* GEN8+ */
-/* DW1 */
-# define GEN8_PSX_PIXEL_SHADER_VALID (1 << 31)
-# define GEN8_PSX_PIXEL_SHADER_NO_RT_WRITE (1 << 30)
-# define GEN8_PSX_OMASK_TO_RENDER_TARGET (1 << 29)
-# define GEN8_PSX_KILL_ENABLE (1 << 28)
-# define GEN8_PSX_COMPUTED_DEPTH_MODE_SHIFT 26
-# define GEN8_PSX_FORCE_COMPUTED_DEPTH (1 << 25)
-# define GEN8_PSX_USES_SOURCE_DEPTH (1 << 24)
-# define GEN8_PSX_USES_SOURCE_W (1 << 23)
-# define GEN8_PSX_ATTRIBUTE_ENABLE (1 << 8)
-# define GEN8_PSX_SHADER_DISABLES_ALPHA_TO_COVERAGE (1 << 7)
-# define GEN8_PSX_SHADER_IS_PER_SAMPLE (1 << 6)
-# define GEN9_PSX_SHADER_COMPUTES_STENCIL (1 << 5)
-# define GEN9_PSX_SHADER_PULLS_BARY (1 << 3)
-# define GEN8_PSX_SHADER_HAS_UAV (1 << 2)
-# define GEN8_PSX_SHADER_USES_INPUT_COVERAGE_MASK (1 << 1)
-# define GEN9_PSX_SHADER_NORMAL_COVERAGE_MASK_SHIFT 0
-
-#define _3DSTATE_WM 0x7814 /* GEN6+ */
-/* DW1: kernel pointer */
-/* DW2 */
-# define GEN6_WM_SPF_MODE (1 << 31)
-# define GEN6_WM_VECTOR_MASK_ENABLE (1 << 30)
-# define GEN6_WM_SAMPLER_COUNT_SHIFT 27
-# define GEN6_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT 18
-# define GEN6_WM_FLOATING_POINT_MODE_IEEE_754 (0 << 16)
-# define GEN6_WM_FLOATING_POINT_MODE_ALT (1 << 16)
-/* DW3: scratch space */
-/* DW4 */
-# define GEN6_WM_STATISTICS_ENABLE (1 << 31)
-# define GEN6_WM_DEPTH_CLEAR (1 << 30)
-# define GEN6_WM_DEPTH_RESOLVE (1 << 28)
-# define GEN6_WM_HIERARCHICAL_DEPTH_RESOLVE (1 << 27)
-# define GEN6_WM_DISPATCH_START_GRF_SHIFT_0 16
-# define GEN6_WM_DISPATCH_START_GRF_SHIFT_1 8
-# define GEN6_WM_DISPATCH_START_GRF_SHIFT_2 0
-/* DW5 */
-# define GEN6_WM_MAX_THREADS_SHIFT 25
-# define GEN6_WM_KILL_ENABLE (1 << 22)
-# define GEN6_WM_COMPUTED_DEPTH (1 << 21)
-# define GEN6_WM_USES_SOURCE_DEPTH (1 << 20)
-# define GEN6_WM_DISPATCH_ENABLE (1 << 19)
-# define GEN6_WM_LINE_END_CAP_AA_WIDTH_0_5 (0 << 16)
-# define GEN6_WM_LINE_END_CAP_AA_WIDTH_1_0 (1 << 16)
-# define GEN6_WM_LINE_END_CAP_AA_WIDTH_2_0 (2 << 16)
-# define GEN6_WM_LINE_END_CAP_AA_WIDTH_4_0 (3 << 16)
-# define GEN6_WM_LINE_AA_WIDTH_0_5 (0 << 14)
-# define GEN6_WM_LINE_AA_WIDTH_1_0 (1 << 14)
-# define GEN6_WM_LINE_AA_WIDTH_2_0 (2 << 14)
-# define GEN6_WM_LINE_AA_WIDTH_4_0 (3 << 14)
-# define GEN6_WM_POLYGON_STIPPLE_ENABLE (1 << 13)
-# define GEN6_WM_LINE_STIPPLE_ENABLE (1 << 11)
-# define GEN6_WM_OMASK_TO_RENDER_TARGET (1 << 9)
-# define GEN6_WM_USES_SOURCE_W (1 << 8)
-# define GEN6_WM_DUAL_SOURCE_BLEND_ENABLE (1 << 7)
-# define GEN6_WM_32_DISPATCH_ENABLE (1 << 2)
-# define GEN6_WM_16_DISPATCH_ENABLE (1 << 1)
-# define GEN6_WM_8_DISPATCH_ENABLE (1 << 0)
-/* DW6 */
-# define GEN6_WM_NUM_SF_OUTPUTS_SHIFT 20
-# define GEN6_WM_POSOFFSET_NONE (0 << 18)
-# define GEN6_WM_POSOFFSET_CENTROID (2 << 18)
-# define GEN6_WM_POSOFFSET_SAMPLE (3 << 18)
-# define GEN6_WM_POSITION_ZW_PIXEL (0 << 16)
-# define GEN6_WM_POSITION_ZW_CENTROID (2 << 16)
-# define GEN6_WM_POSITION_ZW_SAMPLE (3 << 16)
-# define GEN6_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 15)
-# define GEN6_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC (1 << 14)
-# define GEN6_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC (1 << 13)
-# define GEN6_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 12)
-# define GEN6_WM_PERSPECTIVE_CENTROID_BARYCENTRIC (1 << 11)
-# define GEN6_WM_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 10)
-# define GEN6_WM_BARYCENTRIC_INTERPOLATION_MODE_SHIFT 10
-# define GEN6_WM_POINT_RASTRULE_UPPER_RIGHT (1 << 9)
-# define GEN6_WM_MSRAST_OFF_PIXEL (0 << 1)
-# define GEN6_WM_MSRAST_OFF_PATTERN (1 << 1)
-# define GEN6_WM_MSRAST_ON_PIXEL (2 << 1)
-# define GEN6_WM_MSRAST_ON_PATTERN (3 << 1)
-# define GEN6_WM_MSDISPMODE_PERSAMPLE (0 << 0)
-# define GEN6_WM_MSDISPMODE_PERPIXEL (1 << 0)
-/* DW7: kernel 1 pointer */
-/* DW8: kernel 2 pointer */
-
-#define _3DSTATE_CONSTANT_VS 0x7815 /* GEN6+ */
-#define _3DSTATE_CONSTANT_GS 0x7816 /* GEN6+ */
-#define _3DSTATE_CONSTANT_PS 0x7817 /* GEN6+ */
-# define GEN6_CONSTANT_BUFFER_3_ENABLE (1 << 15)
-# define GEN6_CONSTANT_BUFFER_2_ENABLE (1 << 14)
-# define GEN6_CONSTANT_BUFFER_1_ENABLE (1 << 13)
-# define GEN6_CONSTANT_BUFFER_0_ENABLE (1 << 12)
-
-#define _3DSTATE_CONSTANT_HS 0x7819 /* GEN7+ */
-#define _3DSTATE_CONSTANT_DS 0x781A /* GEN7+ */
-
-#define _3DSTATE_STREAMOUT 0x781e /* GEN7+ */
-/* DW1 */
-# define SO_FUNCTION_ENABLE (1 << 31)
-# define SO_RENDERING_DISABLE (1 << 30)
-/* This selects which incoming rendering stream goes down the pipeline. The
- * rendering stream is 0 if not defined by special cases in the GS state.
- */
-# define SO_RENDER_STREAM_SELECT_SHIFT 27
-# define SO_RENDER_STREAM_SELECT_MASK INTEL_MASK(28, 27)
-/* Controls reordering of TRISTRIP_* elements in stream output (not rendering).
- */
-# define SO_REORDER_TRAILING (1 << 26)
-/* Controls SO_NUM_PRIMS_WRITTEN_* and SO_PRIM_STORAGE_* */
-# define SO_STATISTICS_ENABLE (1 << 25)
-# define SO_BUFFER_ENABLE(n) (1 << (8 + (n)))
-/* DW2 */
-# define SO_STREAM_3_VERTEX_READ_OFFSET_SHIFT 29
-# define SO_STREAM_3_VERTEX_READ_OFFSET_MASK INTEL_MASK(29, 29)
-# define SO_STREAM_3_VERTEX_READ_LENGTH_SHIFT 24
-# define SO_STREAM_3_VERTEX_READ_LENGTH_MASK INTEL_MASK(28, 24)
-# define SO_STREAM_2_VERTEX_READ_OFFSET_SHIFT 21
-# define SO_STREAM_2_VERTEX_READ_OFFSET_MASK INTEL_MASK(21, 21)
-# define SO_STREAM_2_VERTEX_READ_LENGTH_SHIFT 16
-# define SO_STREAM_2_VERTEX_READ_LENGTH_MASK INTEL_MASK(20, 16)
-# define SO_STREAM_1_VERTEX_READ_OFFSET_SHIFT 13
-# define SO_STREAM_1_VERTEX_READ_OFFSET_MASK INTEL_MASK(13, 13)
-# define SO_STREAM_1_VERTEX_READ_LENGTH_SHIFT 8
-# define SO_STREAM_1_VERTEX_READ_LENGTH_MASK INTEL_MASK(12, 8)
-# define SO_STREAM_0_VERTEX_READ_OFFSET_SHIFT 5
-# define SO_STREAM_0_VERTEX_READ_OFFSET_MASK INTEL_MASK(5, 5)
-# define SO_STREAM_0_VERTEX_READ_LENGTH_SHIFT 0
-# define SO_STREAM_0_VERTEX_READ_LENGTH_MASK INTEL_MASK(4, 0)
-
-/* 3DSTATE_WM for Gen7 */
-/* DW1 */
-# define GEN7_WM_STATISTICS_ENABLE (1 << 31)
-# define GEN7_WM_DEPTH_CLEAR (1 << 30)
-# define GEN7_WM_DISPATCH_ENABLE (1 << 29)
-# define GEN7_WM_DEPTH_RESOLVE (1 << 28)
-# define GEN7_WM_HIERARCHICAL_DEPTH_RESOLVE (1 << 27)
-# define GEN7_WM_KILL_ENABLE (1 << 25)
-# define GEN7_WM_COMPUTED_DEPTH_MODE_SHIFT 23
-# define GEN7_WM_USES_SOURCE_DEPTH (1 << 20)
-# define GEN7_WM_EARLY_DS_CONTROL_NORMAL (0 << 21)
-# define GEN7_WM_EARLY_DS_CONTROL_PSEXEC (1 << 21)
-# define GEN7_WM_EARLY_DS_CONTROL_PREPS (2 << 21)
-# define GEN7_WM_USES_SOURCE_W (1 << 19)
-# define GEN7_WM_POSITION_ZW_PIXEL (0 << 17)
-# define GEN7_WM_POSITION_ZW_CENTROID (2 << 17)
-# define GEN7_WM_POSITION_ZW_SAMPLE (3 << 17)
-# define GEN7_WM_BARYCENTRIC_INTERPOLATION_MODE_SHIFT 11
-# define GEN7_WM_USES_INPUT_COVERAGE_MASK (1 << 10)
-# define GEN7_WM_LINE_END_CAP_AA_WIDTH_0_5 (0 << 8)
-# define GEN7_WM_LINE_END_CAP_AA_WIDTH_1_0 (1 << 8)
-# define GEN7_WM_LINE_END_CAP_AA_WIDTH_2_0 (2 << 8)
-# define GEN7_WM_LINE_END_CAP_AA_WIDTH_4_0 (3 << 8)
-# define GEN7_WM_LINE_AA_WIDTH_0_5 (0 << 6)
-# define GEN7_WM_LINE_AA_WIDTH_1_0 (1 << 6)
-# define GEN7_WM_LINE_AA_WIDTH_2_0 (2 << 6)
-# define GEN7_WM_LINE_AA_WIDTH_4_0 (3 << 6)
-# define GEN7_WM_POLYGON_STIPPLE_ENABLE (1 << 4)
-# define GEN7_WM_LINE_STIPPLE_ENABLE (1 << 3)
-# define GEN7_WM_POINT_RASTRULE_UPPER_RIGHT (1 << 2)
-# define GEN7_WM_MSRAST_OFF_PIXEL (0 << 0)
-# define GEN7_WM_MSRAST_OFF_PATTERN (1 << 0)
-# define GEN7_WM_MSRAST_ON_PIXEL (2 << 0)
-# define GEN7_WM_MSRAST_ON_PATTERN (3 << 0)
-/* DW2 */
-# define GEN7_WM_MSDISPMODE_PERSAMPLE (0 << 31)
-# define GEN7_WM_MSDISPMODE_PERPIXEL (1 << 31)
-# define HSW_WM_UAV_ONLY (1 << 30)
-
-#define _3DSTATE_PS 0x7820 /* GEN7+ */
-/* DW1: kernel pointer */
-/* DW2 */
-# define GEN7_PS_SPF_MODE (1 << 31)
-# define GEN7_PS_VECTOR_MASK_ENABLE (1 << 30)
-# define GEN7_PS_SAMPLER_COUNT_SHIFT 27
-# define GEN7_PS_SAMPLER_COUNT_MASK INTEL_MASK(29, 27)
-# define GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT 18
-# define GEN7_PS_FLOATING_POINT_MODE_IEEE_754 (0 << 16)
-# define GEN7_PS_FLOATING_POINT_MODE_ALT (1 << 16)
-/* DW3: scratch space */
-/* DW4 */
-# define IVB_PS_MAX_THREADS_SHIFT 24
-# define HSW_PS_MAX_THREADS_SHIFT 23
-# define HSW_PS_SAMPLE_MASK_SHIFT 12
-# define HSW_PS_SAMPLE_MASK_MASK INTEL_MASK(19, 12)
-# define GEN7_PS_PUSH_CONSTANT_ENABLE (1 << 11)
-# define GEN7_PS_ATTRIBUTE_ENABLE (1 << 10)
-# define GEN7_PS_OMASK_TO_RENDER_TARGET (1 << 9)
-# define GEN7_PS_RENDER_TARGET_FAST_CLEAR_ENABLE (1 << 8)
-# define GEN7_PS_DUAL_SOURCE_BLEND_ENABLE (1 << 7)
-# define GEN7_PS_RENDER_TARGET_RESOLVE_ENABLE (1 << 6)
-# define GEN9_PS_RENDER_TARGET_RESOLVE_FULL (3 << 6)
-# define HSW_PS_UAV_ACCESS_ENABLE (1 << 5)
-# define GEN7_PS_POSOFFSET_NONE (0 << 3)
-# define GEN7_PS_POSOFFSET_CENTROID (2 << 3)
-# define GEN7_PS_POSOFFSET_SAMPLE (3 << 3)
-# define GEN7_PS_32_DISPATCH_ENABLE (1 << 2)
-# define GEN7_PS_16_DISPATCH_ENABLE (1 << 1)
-# define GEN7_PS_8_DISPATCH_ENABLE (1 << 0)
-/* DW5 */
-# define GEN7_PS_DISPATCH_START_GRF_SHIFT_0 16
-# define GEN7_PS_DISPATCH_START_GRF_SHIFT_1 8
-# define GEN7_PS_DISPATCH_START_GRF_SHIFT_2 0
-/* DW6: kernel 1 pointer */
-/* DW7: kernel 2 pointer */
-
-#define _3DSTATE_SAMPLE_MASK 0x7818 /* GEN6+ */
-
#define _3DSTATE_DRAWING_RECTANGLE 0x7900
#define _3DSTATE_BLEND_CONSTANT_COLOR 0x7901
#define _3DSTATE_CHROMA_KEY 0x7904
@@ -1292,47 +624,6 @@ enum brw_pixel_shader_coverage_mask_mode {
/* DW2 */
# define GEN7_DEPTH_CLEAR_VALID (1 << 0)
-#define _3DSTATE_SO_DECL_LIST 0x7917 /* GEN7+ */
-/* DW1 */
-# define SO_STREAM_TO_BUFFER_SELECTS_3_SHIFT 12
-# define SO_STREAM_TO_BUFFER_SELECTS_3_MASK INTEL_MASK(15, 12)
-# define SO_STREAM_TO_BUFFER_SELECTS_2_SHIFT 8
-# define SO_STREAM_TO_BUFFER_SELECTS_2_MASK INTEL_MASK(11, 8)
-# define SO_STREAM_TO_BUFFER_SELECTS_1_SHIFT 4
-# define SO_STREAM_TO_BUFFER_SELECTS_1_MASK INTEL_MASK(7, 4)
-# define SO_STREAM_TO_BUFFER_SELECTS_0_SHIFT 0
-# define SO_STREAM_TO_BUFFER_SELECTS_0_MASK INTEL_MASK(3, 0)
-/* DW2 */
-# define SO_NUM_ENTRIES_3_SHIFT 24
-# define SO_NUM_ENTRIES_3_MASK INTEL_MASK(31, 24)
-# define SO_NUM_ENTRIES_2_SHIFT 16
-# define SO_NUM_ENTRIES_2_MASK INTEL_MASK(23, 16)
-# define SO_NUM_ENTRIES_1_SHIFT 8
-# define SO_NUM_ENTRIES_1_MASK INTEL_MASK(15, 8)
-# define SO_NUM_ENTRIES_0_SHIFT 0
-# define SO_NUM_ENTRIES_0_MASK INTEL_MASK(7, 0)
-
-/* SO_DECL DW0 */
-# define SO_DECL_OUTPUT_BUFFER_SLOT_SHIFT 12
-# define SO_DECL_OUTPUT_BUFFER_SLOT_MASK INTEL_MASK(13, 12)
-# define SO_DECL_HOLE_FLAG (1 << 11)
-# define SO_DECL_REGISTER_INDEX_SHIFT 4
-# define SO_DECL_REGISTER_INDEX_MASK INTEL_MASK(9, 4)
-# define SO_DECL_COMPONENT_MASK_SHIFT 0
-# define SO_DECL_COMPONENT_MASK_MASK INTEL_MASK(3, 0)
-
-#define _3DSTATE_SO_BUFFER 0x7918 /* GEN7+ */
-/* DW1 */
-# define GEN8_SO_BUFFER_ENABLE (1 << 31)
-# define SO_BUFFER_INDEX_SHIFT 29
-# define SO_BUFFER_INDEX_MASK INTEL_MASK(30, 29)
-# define GEN8_SO_BUFFER_OFFSET_WRITE_ENABLE (1 << 21)
-# define GEN8_SO_BUFFER_OFFSET_ADDRESS_ENABLE (1 << 20)
-# define SO_BUFFER_PITCH_SHIFT 0
-# define SO_BUFFER_PITCH_MASK INTEL_MASK(11, 0)
-/* DW2: start address */
-/* DW3: end address. */
-
#define CMD_MI_FLUSH 0x0200
# define BLT_X_SHIFT 0
@@ -1356,24 +647,6 @@ enum brw_pixel_shader_coverage_mask_mode {
*/
#define BRW_MAX_NUM_BUFFER_ENTRIES (1 << 27)
-#define MEDIA_VFE_STATE 0x7000
-/* GEN7 DW2, GEN8+ DW3 */
-# define MEDIA_VFE_STATE_MAX_THREADS_SHIFT 16
-# define MEDIA_VFE_STATE_MAX_THREADS_MASK INTEL_MASK(31, 16)
-# define MEDIA_VFE_STATE_URB_ENTRIES_SHIFT 8
-# define MEDIA_VFE_STATE_URB_ENTRIES_MASK INTEL_MASK(15, 8)
-# define MEDIA_VFE_STATE_RESET_GTW_TIMER_SHIFT 7
-# define MEDIA_VFE_STATE_RESET_GTW_TIMER_MASK INTEL_MASK(7, 7)
-# define MEDIA_VFE_STATE_BYPASS_GTW_SHIFT 6
-# define MEDIA_VFE_STATE_BYPASS_GTW_MASK INTEL_MASK(6, 6)
-# define GEN7_MEDIA_VFE_STATE_GPGPU_MODE_SHIFT 2
-# define GEN7_MEDIA_VFE_STATE_GPGPU_MODE_MASK INTEL_MASK(2, 2)
-/* GEN7 DW4, GEN8+ DW5 */
-# define MEDIA_VFE_STATE_URB_ALLOC_SHIFT 16
-# define MEDIA_VFE_STATE_URB_ALLOC_MASK INTEL_MASK(31, 16)
-# define MEDIA_VFE_STATE_CURBE_ALLOC_SHIFT 0
-# define MEDIA_VFE_STATE_CURBE_ALLOC_MASK INTEL_MASK(15, 0)
-
#define MEDIA_CURBE_LOAD 0x7001
#define MEDIA_INTERFACE_DESCRIPTOR_LOAD 0x7002
/* GEN7 DW4, GEN8+ DW5 */
--
2.9.4
More information about the mesa-dev
mailing list