[Mesa-dev] [PATCH 05/30] i965/miptree: Rework aux enabling

[Chad Versace]

On Fri 16 Jun 2017, Jason Ekstrand wrote:
> This commit replaces the complex and confusing set of disable flags with
> two fairly straightforward fields which describe the intended auxiliary
> surface usage and whether or not the miptree supports fast clears.
> Right now, supports_fast_clear can be entirely derived from aux_usage
> but that will not always be the case.
> 
> This commit makes functional changes.  One of these changes is that it
> re-enables multisampled fast-clears which were accidentally disabled in
> cec30a666930ddb8476a9452a89364a24979ff62 around a year ago.  It should
> also enable CCS_E for window-system buffers which are Y-tiled.  They
> will still get a full resolve like CCS_D but we will at least get some
> of the advantage of compression.
> ---
>  src/mesa/drivers/dri/i965/brw_blorp.c         |   4 +-
>  src/mesa/drivers/dri/i965/intel_fbo.c         |   2 +-
>  src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 190 +++++++++++++-------------
>  src/mesa/drivers/dri/i965/intel_mipmap_tree.h |  43 +++---
>  4 files changed, 120 insertions(+), 119 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c
> index 00092ee..9bd25f0 100644
> --- a/src/mesa/drivers/dri/i965/brw_blorp.c
> +++ b/src/mesa/drivers/dri/i965/brw_blorp.c
> @@ -762,7 +762,7 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
>     if (set_write_disables(irb, ctx->Color.ColorMask[buf], color_write_disable))
>        can_fast_clear = false;
>  
> -   if (irb->mt->aux_disable & INTEL_AUX_DISABLE_CCS ||
> +   if (!irb->mt->supports_fast_clear ||
>         !brw_is_color_fast_clear_compatible(brw, irb->mt, &ctx->Color.ClearColor))
>        can_fast_clear = false;
>  
> @@ -785,7 +785,7 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
>         */
>        if (!irb->mt->mcs_buf) {
>           assert(!intel_miptree_is_lossless_compressed(brw, irb->mt));
> -         if (!intel_miptree_alloc_ccs(brw, irb->mt, false)) {
> +         if (!intel_miptree_alloc_ccs(brw, irb->mt)) {

The above assert is useless post-patch, because it occurs inside if
(!irb->mt->mcs_buf) and the top of intel_miptree_is_lossless_compressed
looks like this:

    /* first check */
    if (brw->gen < 9)
        return false;

    /* second check */
    if (!mt->mcs_buf)
        return false;

    ...

Just an observation.