[Mesa-dev] [PATCH] i915: Fix gl_Fragcoord interpolation

[Ville Syrjälä]

On Wed, Jun 21, 2017 at 03:13:22PM -0700, Ian Romanick wrote:
> On 06/21/2017 10:38 AM, ville.syrjala at linux.intel.com wrote:
> > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > 
> > gl_FragCoord contains the window coordinates so it seems to me that
> > we should not use perspective correct interpolation for it. At least
> > now I get similar output as i965/swrast/llvmpipe produce.
> > 
> > This fixes dEQP-GLES2.functional.shaders.builtin_variable.fragcoord_w.
> > dEQP-GLES2.functional.shaders.builtin_variable.fragcoord_xyz was already
> > passing, though I'm not quite sure how it managed to do that.
> 
> I suspect all the vertices had the same wrong w value, so the
> interpolation just worked out.

IIRC the code looked like it was trying to at least have differing Z
values on the vertices, but I must admit I didn't check what kind
of projection it was trying to do. Or maybe I wasn't even reading the
right piece of code. But anyways, the test still passes so I don't
think I'll bother worrying about it.

> 
> > Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> One tiny comment below, but also
> 
> Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
> Cc: mesa-stable at lists.freedesktop.org

Ta.

<snip>
> > diff --git a/src/mesa/drivers/dri/i915/intel_reg.h b/src/mesa/drivers/dri/i915/intel_reg.h
> > index dabbd612ee04..0e482de84281 100644
> > --- a/src/mesa/drivers/dri/i915/intel_reg.h
> > +++ b/src/mesa/drivers/dri/i915/intel_reg.h
> > @@ -93,7 +93,8 @@
> >  #define S2_TEX_COUNT_SHIFT_830		12
> >  #define S2_VERTEX_1_WIDTH_SHIFT_830	0
> >  #define S2_VERTEX_0_WIDTH_SHIFT_830	6
> > -/* S3 not interesting */
> > +
> > +#define S3_TEXCOORD_PERSPECTIVE_DISABLE(unit)	(1<<((unit)*4))
> 
> Might be worth adding the "wrap shortest" bits too in case someone ever
> cares.  I know what they do, but I'm not sure how it's useful.  /shrug/

Sure, I can toss them in there for completeness.

> 
> >  
> >  #define S4_POINT_WIDTH_SHIFT           23
> >  #define S4_POINT_WIDTH_MASK            (0x1ff<<23)
> > 

-- 
Ville Syrjälä
Intel OTC