[Mesa-dev] [PATCH 1/2] nv50/ir: move POW lowering into BuildUtil

[Karol Herbst]

It's the same for all supported chipsets.

Signed-off-by: Karol Herbst <karolherbst at gmail.com>
---
 .../drivers/nouveau/codegen/nv50_ir_build_util.cpp    | 16 ++++++++++++++++
 .../drivers/nouveau/codegen/nv50_ir_build_util.h      |  2 ++
 .../drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp | 19 +------------------
 .../drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 18 +-----------------
 .../drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h   |  1 -
 5 files changed, 20 insertions(+), 36 deletions(-)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp
index 84ebfdb1cb..5756e1b4d4 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp
@@ -636,4 +636,20 @@ BuildUtil::split64BitOpPostRA(Function *fn, Instruction *i,
    return hi;
 }
 
+bool
+BuildUtil::lowerPOW(Instruction *i)
+{
+   LValue *val = getScratch();
+
+   mkOp1(OP_LG2, TYPE_F32, val, i->getSrc(0));
+   mkOp2(OP_MUL, TYPE_F32, val, i->getSrc(1), val)->dnz = 1;
+   mkOp1(OP_PREEX2, TYPE_F32, val, val);
+
+   i->op = OP_EX2;
+   i->setSrc(0, val);
+   i->setSrc(1, NULL);
+
+   return true;
+}
+
 } // namespace nv50_ir
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.h b/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.h
index d171f64d9a..aac5b609e2 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.h
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.h
@@ -103,6 +103,8 @@ public:
 
    Value *loadImm(Value *dst, int i) { return loadImm(dst, (uint32_t)i); }
 
+   bool lowerPOW(Instruction *);
+
    // returns high part of the operation
    static Instruction *split64BitOpPostRA(Function *, Instruction *,
                                           Value *zero, Value *carry);
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp
index 36ab837f6e..2b187086cf 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp
@@ -626,7 +626,6 @@ private:
 
    bool handleDIV(Instruction *);
    bool handleSQRT(Instruction *);
-   bool handlePOW(Instruction *);
 
    bool handleSET(Instruction *);
    bool handleSLCT(CmpInstruction *);
@@ -1245,22 +1244,6 @@ NV50LoweringPreSSA::handleSQRT(Instruction *i)
 }
 
 bool
-NV50LoweringPreSSA::handlePOW(Instruction *i)
-{
-   LValue *val = bld.getScratch();
-
-   bld.mkOp1(OP_LG2, TYPE_F32, val, i->getSrc(0));
-   bld.mkOp2(OP_MUL, TYPE_F32, val, i->getSrc(1), val)->dnz = 1;
-   bld.mkOp1(OP_PREEX2, TYPE_F32, val, val);
-
-   i->op = OP_EX2;
-   i->setSrc(0, val);
-   i->setSrc(1, NULL);
-
-   return true;
-}
-
-bool
 NV50LoweringPreSSA::handleEXPORT(Instruction *i)
 {
    if (prog->getType() == Program::TYPE_FRAGMENT) {
@@ -1416,7 +1399,7 @@ NV50LoweringPreSSA::visit(Instruction *i)
    case OP_SELP:
       return handleSELP(i);
    case OP_POW:
-      return handlePOW(i);
+      return bld.lowerPOW(i);
    case OP_DIV:
       return handleDIV(i);
    case OP_SQRT:
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index 64d743708a..bb9ef7a468 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -2700,22 +2700,6 @@ NVC0LoweringPass::handleSQRT(Instruction *i)
 }
 
 bool
-NVC0LoweringPass::handlePOW(Instruction *i)
-{
-   LValue *val = bld.getScratch();
-
-   bld.mkOp1(OP_LG2, TYPE_F32, val, i->getSrc(0));
-   bld.mkOp2(OP_MUL, TYPE_F32, val, i->getSrc(1), val)->dnz = 1;
-   bld.mkOp1(OP_PREEX2, TYPE_F32, val, val);
-
-   i->op = OP_EX2;
-   i->setSrc(0, val);
-   i->setSrc(1, NULL);
-
-   return true;
-}
-
-bool
 NVC0LoweringPass::handleEXPORT(Instruction *i)
 {
    if (prog->getType() == Program::TYPE_FRAGMENT) {
@@ -2813,7 +2797,7 @@ NVC0LoweringPass::visit(Instruction *i)
       i->setSrc(0, i->getDef(0));
       break;
    case OP_POW:
-      return handlePOW(i);
+      return bld.lowerPOW(i);
    case OP_DIV:
       return handleDIV(i);
    case OP_MOD:
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h
index 7fae7e24b9..4e75fd6f33 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.h
@@ -100,7 +100,6 @@ protected:
    bool handleDIV(Instruction *);
    bool handleMOD(Instruction *);
    bool handleSQRT(Instruction *);
-   bool handlePOW(Instruction *);
    bool handleTEX(TexInstruction *);
    bool handleTXD(TexInstruction *);
    bool handleTXQ(TexInstruction *);
-- 
2.13.1