[Mesa-dev] [PATCH 5/6] i965/vec4: fix resolve reladdr case on DF scratch read/write on IVB
Samuel Iglesias Gonsálvez
siglesias at igalia.com
Fri Jun 23 09:25:45 UTC 2017
Please ignore this patch, I have a better solution that will be
included in the v2 of the patch series.
Sam
On Thu, 2017-06-15 at 13:15 +0200, Samuel Iglesias Gonsálvez wrote:
> We emit scratch read/write to resolve reladdr and when moving
> varyings to scratch memory, however these instructions are emitted
> before lower simd splitting and before scalarizing DF instructions.
> As the code added for doing DF scratch read/writes assumes both
> were previously done, added a flag to fallback to old behavior.
>
> Fixes {vs,gs}-array-copy tests on piglit.
>
> Signed-off-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
> ---
> src/intel/compiler/brw_vec4.h | 9 +++++----
> src/intel/compiler/brw_vec4_reg_allocate.cpp | 4 ++--
> src/intel/compiler/brw_vec4_visitor.cpp | 13 +++++++------
> 3 files changed, 14 insertions(+), 12 deletions(-)
>
> diff --git a/src/intel/compiler/brw_vec4.h
> b/src/intel/compiler/brw_vec4.h
> index a5b45aca21..3cb1506d85 100644
> --- a/src/intel/compiler/brw_vec4.h
> +++ b/src/intel/compiler/brw_vec4.h
> @@ -294,16 +294,17 @@ public:
> src_reg get_scratch_offset(bblock_t *block, vec4_instruction
> *inst,
> src_reg *reladdr, int reg_offset);
> void emit_scratch_read(bblock_t *block, vec4_instruction *inst,
> - dst_reg dst,
> - src_reg orig_src,
> - int base_offset);
> + dst_reg dst,
> + src_reg orig_src,
> + int base_offset,
> + bool resolve_reladdr);
> void emit_1grf_df_ivb_scratch_read(bblock_t *block,
> vec4_instruction *inst,
> dst_reg temp, src_reg
> orig_src,
> int base_offset, bool
> first_grf);
>
> void emit_scratch_write(bblock_t *block, vec4_instruction *inst,
> - int base_offset);
> + int base_offset, bool resolve_addr);
> void emit_pull_constant_load(bblock_t *block, vec4_instruction
> *inst,
> dst_reg dst,
> src_reg orig_src,
> diff --git a/src/intel/compiler/brw_vec4_reg_allocate.cpp
> b/src/intel/compiler/brw_vec4_reg_allocate.cpp
> index ec5ba10e86..58cd862841 100644
> --- a/src/intel/compiler/brw_vec4_reg_allocate.cpp
> +++ b/src/intel/compiler/brw_vec4_reg_allocate.cpp
> @@ -530,7 +530,7 @@ vec4_visitor::spill_reg(int spill_reg_nr)
> temp.offset = 0;
> temp.swizzle = BRW_SWIZZLE_XYZW;
> emit_scratch_read(block, inst,
> - dst_reg(temp), inst->src[i],
> spill_offset);
> + dst_reg(temp), inst->src[i],
> spill_offset, false);
> temp.offset = inst->src[i].offset;
> }
> assert(scratch_reg != -1);
> @@ -539,7 +539,7 @@ vec4_visitor::spill_reg(int spill_reg_nr)
> }
>
> if (inst->dst.file == VGRF && inst->dst.nr == spill_reg_nr) {
> - emit_scratch_write(block, inst, spill_offset);
> + emit_scratch_write(block, inst, spill_offset, false);
> scratch_reg = inst->dst.nr;
> }
> }
> diff --git a/src/intel/compiler/brw_vec4_visitor.cpp
> b/src/intel/compiler/brw_vec4_visitor.cpp
> index 0d5ad4d8f8..158feca6c9 100644
> --- a/src/intel/compiler/brw_vec4_visitor.cpp
> +++ b/src/intel/compiler/brw_vec4_visitor.cpp
> @@ -1532,7 +1532,7 @@
> vec4_visitor::emit_1grf_df_ivb_scratch_read(bblock_t *block,
> void
> vec4_visitor::emit_scratch_read(bblock_t *block, vec4_instruction
> *inst,
> dst_reg temp, src_reg orig_src,
> - int base_offset)
> + int base_offset, bool
> resolve_reladdr)
> {
> assert(orig_src.offset % REG_SIZE == 0);
> int reg_offset = base_offset + orig_src.offset / REG_SIZE;
> @@ -1541,7 +1541,7 @@ vec4_visitor::emit_scratch_read(bblock_t
> *block, vec4_instruction *inst,
>
> if (type_sz(orig_src.type) < 8) {
> emit_before(block, inst, SCRATCH_READ(temp, index));
> - } else if (devinfo->gen == 7 && !devinfo->is_haswell &&
> + } else if (devinfo->gen == 7 && !devinfo->is_haswell &&
> !resolve_reladdr &&
> type_sz(temp.type) == 8) {
> /* Set the offset to the base offset because we address the
> base GRF of
> * the DF. We will take into account the second GRF in the
> scratch write emission.
> @@ -1574,7 +1574,7 @@ vec4_visitor::emit_scratch_read(bblock_t
> *block, vec4_instruction *inst,
> */
> void
> vec4_visitor::emit_scratch_write(bblock_t *block, vec4_instruction
> *inst,
> - int base_offset)
> + int base_offset, bool
> resolve_reladdr)
> {
> assert(inst->dst.offset % REG_SIZE == 0);
> int reg_offset = base_offset + inst->dst.offset / REG_SIZE;
> @@ -1606,7 +1606,8 @@ vec4_visitor::emit_scratch_write(bblock_t
> *block, vec4_instruction *inst,
> write->ir = inst->ir;
> write->annotation = inst->annotation;
> inst->insert_after(block, write);
> - } else if (is_64bit && devinfo->gen == 7 && !devinfo->is_haswell)
> {
> + } else if (is_64bit && devinfo->gen == 7 && !devinfo->is_haswell
> &&
> + !resolve_reladdr) {
> /* Set the offset to the base offset because we address the
> base GRF of
> * the DF. We will take into account the second GRF in the
> scratch write emission.
> */
> @@ -1715,7 +1716,7 @@ vec4_visitor::emit_resolve_reladdr(int
> scratch_loc[], bblock_t *block,
> if (src.file == VGRF && scratch_loc[src.nr] != -1) {
> dst_reg temp = dst_reg(this, type_sz(src.type) == 8 ?
> glsl_type::dvec4_type : glsl_type::vec4_type);
> - emit_scratch_read(block, inst, temp, src,
> scratch_loc[src.nr]);
> + emit_scratch_read(block, inst, temp, src, scratch_loc[src.nr],
> true);
> src.nr = temp.nr;
> src.offset %= REG_SIZE;
> src.reladdr = NULL;
> @@ -1790,7 +1791,7 @@
> vec4_visitor::move_grf_array_access_to_scratch()
> * accesses for dst we can safely do the scratch write for dst
> itself
> */
> if (inst->dst.file == VGRF && scratch_loc[inst->dst.nr] != -1)
> - emit_scratch_write(block, inst, scratch_loc[inst->dst.nr]);
> + emit_scratch_write(block, inst, scratch_loc[inst->dst.nr],
> true);
>
> /* Now handle scratch access on any src. In this case, since
> inst->src[i]
> * already is a src_reg, we can just call emit_resolve_reladdr
> with
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